Searched refs:REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL (Results 1 - 4 of 4) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gmu.xml.h | 237 #define REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL 0x000050c0 macro
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| H A D | a6xx_gmu.c | 624 gmu_write(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, 0x9c40400); in a6xx_gmu_power_config()
630 gmu_rmw(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, 0, in a6xx_gmu_power_config()
637 gmu_rmw(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, 0, in a6xx_gmu_power_config()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gmu.xml.h | 237 #define REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL 0x000050c0 macro
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| H A D | a6xx_gmu.c | 645 gmu_write(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, 0x9c40400); in a6xx_gmu_power_config()
651 gmu_rmw(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, 0, in a6xx_gmu_power_config()
658 gmu_rmw(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, 0, in a6xx_gmu_power_config()
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