Searched refs:REG_A6XX_GMU_HOST2GMU_INTR_SET (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gmu.c | 294 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 1 << request); in a6xx_gmu_set_oob()
317 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, in a6xx_gmu_clear_oob()
321 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, in a6xx_gmu_clear_oob()
329 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, in a6xx_gmu_clear_oob()
333 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, in a6xx_gmu_clear_oob()
337 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, in a6xx_gmu_clear_oob()
341 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, in a6xx_gmu_clear_oob()
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| H A D | a6xx_gmu.xml.h | 335 #define REG_A6XX_GMU_HOST2GMU_INTR_SET 0x00005194 macro
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| H A D | a6xx_hfi.c | 92 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 0x01); in a6xx_hfi_queue_write()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gmu.xml.h | 337 #define REG_A6XX_GMU_HOST2GMU_INTR_SET 0x00005194 macro
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| H A D | a6xx_gmu.c | 322 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 1 << request); in a6xx_gmu_set_oob()
355 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 1 << bit); in a6xx_gmu_clear_oob()
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| H A D | a6xx_hfi.c | 96 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 0x01); in a6xx_hfi_queue_write()
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