Searched refs:REG_A6XX_GMU_GMU2HOST_INTR_CLR (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gmu.xml.h | 327 #define REG_A6XX_GMU_GMU2HOST_INTR_CLR 0x00005191 macro
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| H A D | a6xx_gmu.c | 65 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, status); in a6xx_hfi_irq()
307 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, 1 << ack); in a6xx_gmu_set_oob()
957 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, ~0); in a6xx_gmu_resume()
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| H A D | a6xx_hfi.c | 115 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, in a6xx_hfi_wait_for_ack()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gmu.xml.h | 329 #define REG_A6XX_GMU_GMU2HOST_INTR_CLR 0x00005191 macro
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| H A D | a6xx_gmu.c | 65 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, status); in a6xx_hfi_irq()
335 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, 1 << ack); in a6xx_gmu_set_oob()
1005 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, ~0); in a6xx_gmu_resume()
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| H A D | a6xx_hfi.c | 119 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, in a6xx_hfi_wait_for_ack()
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