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Help
Searched
refs:REGV_RD32
(Results
1 - 4
of
4
) sorted by relevance
/kernel/linux/linux-6.6/drivers/accel/ivpu/
H
A
D
ivpu_hw_37xx.c
89
u32 gen_ctrl =
REGV_RD32
(VPU_37XX_HOST_SS_GEN_CTRL);
in ivpu_hw_read_platform()
295
u32 val =
REGV_RD32
(VPU_37XX_HOST_SS_CPR_RST_SET);
in ivpu_boot_host_ss_rst_drive()
312
u32 val =
REGV_RD32
(VPU_37XX_HOST_SS_CPR_CLK_SET);
in ivpu_boot_host_ss_clk_drive()
329
u32 val =
REGV_RD32
(VPU_37XX_HOST_SS_NOC_QREQN);
in ivpu_boot_noc_qreqn_check()
339
u32 val =
REGV_RD32
(VPU_37XX_HOST_SS_NOC_QACCEPTN);
in ivpu_boot_noc_qacceptn_check()
349
u32 val =
REGV_RD32
(VPU_37XX_HOST_SS_NOC_QDENY);
in ivpu_boot_noc_qdeny_check()
359
u32 val =
REGV_RD32
(MTL_VPU_TOP_NOC_QREQN);
in ivpu_boot_top_noc_qrenqn_check()
370
u32 val =
REGV_RD32
(MTL_VPU_TOP_NOC_QACCEPTN);
in ivpu_boot_top_noc_qacceptn_check()
381
u32 val =
REGV_RD32
(MTL_VPU_TOP_NOC_QDENY);
in ivpu_boot_top_noc_qdeny_check()
407
val =
REGV_RD32
(VPU_37XX_HOST_SS_NOC_QREQ
in ivpu_boot_host_ss_axi_drive()
[all...]
H
A
D
ivpu_hw_40xx.c
270
u32 val =
REGV_RD32
(VPU_40XX_HOST_SS_CPR_RST_EN);
in ivpu_boot_host_ss_rst_drive()
287
u32 val =
REGV_RD32
(VPU_40XX_HOST_SS_CPR_CLK_EN);
in ivpu_boot_host_ss_clk_drive()
304
u32 val =
REGV_RD32
(VPU_40XX_HOST_SS_NOC_QREQN);
in ivpu_boot_noc_qreqn_check()
314
u32 val =
REGV_RD32
(VPU_40XX_HOST_SS_NOC_QACCEPTN);
in ivpu_boot_noc_qacceptn_check()
324
u32 val =
REGV_RD32
(VPU_40XX_HOST_SS_NOC_QDENY);
in ivpu_boot_noc_qdeny_check()
334
u32 val =
REGV_RD32
(VPU_40XX_TOP_NOC_QREQN);
in ivpu_boot_top_noc_qrenqn_check()
345
u32 val =
REGV_RD32
(VPU_40XX_TOP_NOC_QACCEPTN);
in ivpu_boot_top_noc_qacceptn_check()
356
u32 val =
REGV_RD32
(VPU_40XX_TOP_NOC_QDENY);
in ivpu_boot_top_noc_qdeny_check()
367
u32 val =
REGV_RD32
(VPU_40XX_HOST_SS_AON_IDLE_GEN);
in ivpu_boot_idle_gen_drive()
405
val =
REGV_RD32
(VPU_40XX_HOST_SS_NOC_QREQ
in ivpu_boot_host_ss_axi_drive()
[all...]
H
A
D
ivpu_mmu.c
253
val =
REGV_RD32
(VPU_37XX_HOST_MMU_IDR0);
in ivpu_mmu_config_check()
257
val =
REGV_RD32
(VPU_37XX_HOST_MMU_IDR1);
in ivpu_mmu_config_check()
261
val =
REGV_RD32
(VPU_37XX_HOST_MMU_IDR3);
in ivpu_mmu_config_check()
272
val =
REGV_RD32
(VPU_37XX_HOST_MMU_IDR5);
in ivpu_mmu_config_check()
803
evtq->prod =
REGV_RD32
(VPU_37XX_HOST_MMU_EVTQ_PROD_SEC);
in ivpu_mmu_get_event()
841
gerror_val =
REGV_RD32
(VPU_37XX_HOST_MMU_GERROR);
in ivpu_mmu_irq_gerr_handler()
842
gerrorn_val =
REGV_RD32
(VPU_37XX_HOST_MMU_GERRORN);
in ivpu_mmu_irq_gerr_handler()
H
A
D
ivpu_hw_reg_io.h
24
#define
REGV_RD32
(reg) ivpu_hw_reg_rd32(vdev, vdev->regv, (reg), #reg, __func__)
macro
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