| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v2_0.c | 892 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_0_start_dpg_mode()
1064 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_0_start()
1969 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_0_start_sriov()
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| H A D | vcn_v3_0.c | 1003 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v3_0_start_dpg_mode()
1181 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v3_0_start()
1359 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v3_0_start_sriov()
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| H A D | vcn_v2_5.c | 875 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_5_start_dpg_mode()
1067 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_5_start()
1286 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_5_sriov_start()
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| H A D | uvd_v5_0.c | 396 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in uvd_v5_0_start()
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| H A D | vcn_v1_0.c | 914 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v1_0_start_spg_mode()
1072 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v1_0_start_dpg_mode()
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| H A D | uvd_v6_0.c | 819 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in uvd_v6_0_start()
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| H A D | sid.h | 1278 #define RB_NO_UPDATE (1 << 27) macro
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| H A D | uvd_v7_0.c | 1065 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in uvd_v7_0_start()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v2_0.c | 891 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_0_start_dpg_mode()
1063 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_0_start()
1978 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_0_start_sriov()
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| H A D | vcn_v2_5.c | 923 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_5_start_dpg_mode()
1115 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_5_start()
1334 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_5_sriov_start()
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| H A D | uvd_v5_0.c | 421 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in uvd_v5_0_start()
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| H A D | vcn_v3_0.c | 1048 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v3_0_start_dpg_mode()
1235 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v3_0_start()
1420 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v3_0_start_sriov()
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| H A D | vcn_v1_0.c | 915 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v1_0_start_spg_mode()
1073 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v1_0_start_dpg_mode()
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| H A D | uvd_v6_0.c | 837 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in uvd_v6_0_start()
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| H A D | sid.h | 1278 #define RB_NO_UPDATE (1 << 27) macro
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| H A D | uvd_v7_0.c | 1086 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in uvd_v7_0_start()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| H A D | rv770d.h | 352 #define RB_NO_UPDATE (1 << 27) macro
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| H A D | nid.h | 487 #define RB_NO_UPDATE (1 << 27) macro
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| H A D | cikd.h | 1306 #define RB_NO_UPDATE (1 << 27) macro
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| H A D | sid.h | 1250 #define RB_NO_UPDATE (1 << 27) macro
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| H A D | r600.c | 2657 RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3)); in r600_cp_load_microcode()
2755 tmp |= RB_NO_UPDATE; in r600_cp_resume()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| H A D | rv770d.h | 352 #define RB_NO_UPDATE (1 << 27) macro
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| H A D | nid.h | 487 #define RB_NO_UPDATE (1 << 27) macro
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| H A D | cikd.h | 1306 #define RB_NO_UPDATE (1 << 27) macro
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| H A D | sid.h | 1250 #define RB_NO_UPDATE (1 << 27) macro
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