Searched refs:RADEON_CLOCK_CNTL_INDEX (Results 1 - 12 of 12) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
H A D | radeon_legacy_crtc.c | 937 WREG32_P(RADEON_CLOCK_CNTL_INDEX, in radeon_set_pll() 958 WREG32_P(RADEON_CLOCK_CNTL_INDEX, in radeon_set_pll()
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H A D | radeon_legacy_tv.c | 289 WREG8(RADEON_CLOCK_CNTL_INDEX, RADEON_PLL_TEST_CNTL); in radeon_wait_pll_lock()
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H A D | r100.c | 2872 save = RREG32(RADEON_CLOCK_CNTL_INDEX); in r100_pll_errata_after_data() 2874 WREG32(RADEON_CLOCK_CNTL_INDEX, tmp); in r100_pll_errata_after_data() 2876 WREG32(RADEON_CLOCK_CNTL_INDEX, save); in r100_pll_errata_after_data() 2886 WREG8(RADEON_CLOCK_CNTL_INDEX, reg & 0x3f); in r100_pll_rreg() 2899 WREG8(RADEON_CLOCK_CNTL_INDEX, ((reg & 0x3f) | RADEON_PLL_WR_EN)); in r100_pll_wreg()
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H A D | radeon_legacy_encoders.c | 245 WREG32(RADEON_CLOCK_CNTL_INDEX, 0); in radeon_legacy_lvds_mode_set()
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H A D | radeon_reg.h | 346 #define RADEON_CLOCK_CNTL_INDEX 0x0008 macro
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H A D | radeon_combios.c | 1150 ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3; in radeon_legacy_get_lvds_info_from_regs()
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/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
H A D | radeon_legacy_crtc.c | 937 WREG32_P(RADEON_CLOCK_CNTL_INDEX, in radeon_set_pll() 958 WREG32_P(RADEON_CLOCK_CNTL_INDEX, in radeon_set_pll()
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H A D | radeon_legacy_tv.c | 288 WREG8(RADEON_CLOCK_CNTL_INDEX, RADEON_PLL_TEST_CNTL); in radeon_wait_pll_lock()
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H A D | r100.c | 2879 save = RREG32(RADEON_CLOCK_CNTL_INDEX); in r100_pll_errata_after_data() 2881 WREG32(RADEON_CLOCK_CNTL_INDEX, tmp); in r100_pll_errata_after_data() 2883 WREG32(RADEON_CLOCK_CNTL_INDEX, save); in r100_pll_errata_after_data() 2893 WREG8(RADEON_CLOCK_CNTL_INDEX, reg & 0x3f); in r100_pll_rreg() 2906 WREG8(RADEON_CLOCK_CNTL_INDEX, ((reg & 0x3f) | RADEON_PLL_WR_EN)); in r100_pll_wreg()
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H A D | radeon_legacy_encoders.c | 248 WREG32(RADEON_CLOCK_CNTL_INDEX, 0); in radeon_legacy_lvds_mode_set()
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H A D | radeon_reg.h | 346 #define RADEON_CLOCK_CNTL_INDEX 0x0008 macro
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H A D | radeon_combios.c | 1146 ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3; in radeon_legacy_get_lvds_info_from_regs()
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