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/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/
H A Dlos_exc.S192 ADD R3, R13, #104
200 ADD R3, R13, #32
201 PUSH {R3} ; save IRQ SP ; store message-->exc: MSP(R13)
233 MOV R2, R13
234 SUB R13, #96 ; add 8 Bytes reg(for STMFD)
253 MOV R2, R13 ;no auto push floating registers
254 SUB R13, #32 ; add 8 Bytes reg(for STMFD)
268 MOV R3, R13 ; R13:the 4th param
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/
H A Dlos_exc.S192 ADD R3, R13, #104
200 ADD R3, R13, #32
201 PUSH {R3} ; save IRQ SP ; store message-->exc: MSP(R13)
233 MOV R2, R13
234 SUB R13, #96 ; add 8 Bytes reg(for STMFD)
253 MOV R2, R13 ;no auto push floating registers
254 SUB R13, #32 ; add 8 Bytes reg(for STMFD)
268 MOV R3, R13 ; R13:the 4th param
/kernel/linux/linux-5.10/arch/hexagon/kernel/
H A Dvm_entry.S50 memd(R0 + #_PT_R1312) = R13:12; \
56 R13 = lc1; } \ define
65 { memd(R0 + #_PT_LC1SA1) = R13:12; \
94 memd(R0 + #_PT_R1312) = R13:12; \
101 R13:12 = C3:2; } \
106 memd(R0 + #_PT_LC1SA1) = R13:12; \
130 { R13:12 = memd(R0 + #_PT_LC1SA1); \
137 lc1 = R13; } \
144 { R13:12 = memd(R0 + #_PT_R1312); \
163 R13
[all...]
/kernel/linux/linux-6.6/arch/hexagon/kernel/
H A Dvm_entry.S50 memd(R0 + #_PT_R1312) = R13:12; \
56 R13 = lc1; } \ define
65 { memd(R0 + #_PT_LC1SA1) = R13:12; \
94 memd(R0 + #_PT_R1312) = R13:12; \
101 R13:12 = C3:2; } \
106 memd(R0 + #_PT_LC1SA1) = R13:12; \
130 { R13:12 = memd(R0 + #_PT_LC1SA1); \
137 lc1 = R13; } \
144 { R13:12 = memd(R0 + #_PT_R1312); \
163 R13
[all...]
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/
H A Dlos_exc.S265 ADD R3, R13, #104
278 ADD R3, R13, #32
279 PUSH {R3} // save IRQ SP // store message-->exc: MSP(R13)
316 MOV R2, R13
317 SUB R13, #96 // add 8 Bytes reg(for STMFD)
341 MOV R2, R13 // no auto push floating registers
342 SUB R13, #32 // add 8 Bytes reg(for STMFD)
361 MOV R3, R13 // R13:the 4th param
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/
H A Dlos_exc.S265 ADD R3, R13, #104
278 ADD R3, R13, #32
279 PUSH {R3} // save IRQ SP // store message-->exc: MSP(R13)
316 MOV R2, R13
317 SUB R13, #96 // add 8 Bytes reg(for STMFD)
341 MOV R2, R13 // no auto push floating registers
342 SUB R13, #32 // add 8 Bytes reg(for STMFD)
361 MOV R3, R13 // R13:the 4th param
/kernel/liteos_m/arch/arm/cortex-m3/keil/
H A Dlos_exc.S203 ADD R3, R13, #104
211 ADD R3, R13, #32
212 PUSH {R3} ; save IRQ SP ; store message-->exc: MSP(R13)
244 MOV R2, R13
245 SUB R13, #96 ; add 8 Bytes reg(for STMFD)
264 MOV R2, R13 ;no auto push floating registers
265 SUB R13, #32 ; add 8 Bytes reg(for STMFD)
279 MOV R3, R13 ; R13:the 4th param
/kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/
H A Dlos_exc.S203 ADD R3, R13, #104
211 ADD R3, R13, #32
212 PUSH {R3} ; save IRQ SP ; store message-->exc: MSP(R13)
244 MOV R2, R13
245 SUB R13, #96 ; add 8 Bytes reg(for STMFD)
264 MOV R2, R13 ;no auto push floating registers
265 SUB R13, #32 ; add 8 Bytes reg(for STMFD)
279 MOV R3, R13 ; R13:the 4th param
/kernel/liteos_m/arch/arm/cortex-m4/iar/
H A Dlos_exc.S203 ADD R3, R13, #104
211 ADD R3, R13, #32
212 PUSH {R3} ; save IRQ SP ; store message-->exc: MSP(R13)
244 MOV R2, R13
245 SUB R13, #96 ; add 8 Bytes reg(for STMFD)
264 MOV R2, R13 ;no auto push floating registers
265 SUB R13, #32 ; add 8 Bytes reg(for STMFD)
279 MOV R3, R13 ; R13:the 4th param
/kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/
H A Dlos_exc.S203 ADD R3, R13, #104
211 ADD R3, R13, #32
212 PUSH {R3} ; save IRQ SP ; store message-->exc: MSP(R13)
244 MOV R2, R13
245 SUB R13, #96 ; add 8 Bytes reg(for STMFD)
264 MOV R2, R13 ;no auto push floating registers
265 SUB R13, #32 ; add 8 Bytes reg(for STMFD)
279 MOV R3, R13 ; R13:the 4th param
/kernel/liteos_m/arch/arm/cortex-m7/iar/
H A Dlos_exc.S203 ADD R3, R13, #104
211 ADD R3, R13, #32
212 PUSH {R3} ; save IRQ SP ; store message-->exc: MSP(R13)
244 MOV R2, R13
245 SUB R13, #96 ; add 8 Bytes reg(for STMFD)
264 MOV R2, R13 ;no auto push floating registers
265 SUB R13, #32 ; add 8 Bytes reg(for STMFD)
279 MOV R3, R13 ; R13:the 4th param
/kernel/liteos_a/arch/arm/arm/src/
H A Dlos_hw_exc.S179 STMFD SP, {R13, R14}^ @ push user sp and lr
194 STMFD SP, {R13, R14}^
234 LDMFD SP, {R13, R14}^ @ Restore user mode R13/R14
260 STMFD SP, {R13, R14}^
302 STMFD SP, {R13, R14}^
337 LDMFD SP, {R13, R14}^
350 STMFD SP, {R13, R14}^
368 STMFD SP, {R13, R14}^
H A Dlos_dispatch.S132 LDMFD SP, {R13, R14}^
159 STMFD SP, {R13, R14}^
202 LDMFD SP, {R13, R14}^
/kernel/uniproton/src/arch/cpu/armv7-m/cortex-m4/
H A Dprt_hw_exc.S238 ADD R3, R13, #OS_NORMAL_PUSH_SP_AUTO @ xPSR, PC, LR, R12,R0~R3 hardware save,8*4 bytes
241 ADD R3, R13, #OS_FPU_PUSH_SP_AUTO @ xPSR, PC, LR, R12,R0~R3 and float register hardware save
244 PUSH {R3} @ store message-->exc: MSP(R13),save IRQ SP
252 MOV R2, R13
253 SUB R13, #OS_NORMAL_PUSH_SP_AUTO @ first add 8*4 Bytes Revs (for Reg. STMFD xPSR, PC, LR, R12,R0~R3)
273 MOV R2, R13 @ R13:the 3th param
/kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/
H A Dlos_exc.S281 ADD R3, R13, #104
294 ADD R3, R13, #32
295 PUSH {R3} // save IRQ SP // store message-->exc: MSP(R13)
332 MOV R2, R13
333 SUB R13, #96 // add 8 Bytes reg(for STMFD)
357 MOV R2, R13 // no auto push floating registers
358 SUB R13, #32 // add 8 Bytes reg(for STMFD)
377 MOV R3, R13 // R13:the 4th param
/kernel/liteos_m/arch/arm/cortex-m4/gcc/
H A Dlos_exc.S296 ADD R3, R13, #104
309 ADD R3, R13, #32
310 PUSH {R3} // store message-->exc: MSP(R13)
347 MOV R2, R13
348 SUB R13, #96 // add 8 Bytes reg(for STMFD)
372 MOV R2, R13 // no auto push floating registers
373 SUB R13, #32 // add 8 Bytes reg(for STMFD)
392 MOV R3, R13 // R13:the 4th param
/kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/
H A Dlos_exc.S278 ADD R3, R13, #104
291 ADD R3, R13, #32
292 PUSH {R3} // save IRQ SP // store message-->exc: MSP(R13)
329 MOV R2, R13
330 SUB R13, #96 // add 8 Bytes reg(for STMFD)
354 MOV R2, R13 // no auto push floating registers
355 SUB R13, #32 // add 8 Bytes reg(for STMFD)
374 MOV R3, R13 // R13:the 4th param
/kernel/liteos_m/arch/arm/cortex-m7/gcc/
H A Dlos_exc.S281 ADD R3, R13, #104
294 ADD R3, R13, #32
295 PUSH {R3} // save IRQ SP // store message-->exc: MSP(R13)
332 MOV R2, R13
333 SUB R13, #96 // add 8 Bytes reg(for STMFD)
357 MOV R2, R13 // no auto push floating registers
358 SUB R13, #32 // add 8 Bytes reg(for STMFD)
377 MOV R3, R13 // R13:the 4th param
/kernel/linux/linux-5.10/tools/perf/arch/powerpc/tests/
H A Dregs_load.S18 #define R13 13 * 8 define
57 std 13, R13(3)
/kernel/linux/linux-6.6/tools/perf/arch/powerpc/tests/
H A Dregs_load.S18 #define R13 13 * 8 define
57 std 13, R13(3)
/kernel/linux/linux-5.10/arch/x86/um/
H A Dptrace_64.c29 [R13 >> 3] = HOST_R13,
61 case R13: in putreg()
139 case R13: in getreg()
/kernel/linux/linux-6.6/arch/x86/um/
H A Dptrace_64.c30 [R13 >> 3] = HOST_R13,
62 case R13: in putreg()
140 case R13: in getreg()
/kernel/linux/linux-5.10/tools/perf/arch/x86/tests/
H A Dregs_load.S25 #define R13 21 * 8 define
59 movq %r13, R13(%rdi)
/kernel/linux/linux-6.6/tools/perf/arch/x86/tests/
H A Dregs_load.S25 #define R13 21 * 8 define
59 movq %r13, R13(%rdi)
/kernel/linux/linux-5.10/arch/x86/include/uapi/asm/
H A Dptrace-abi.h35 #define R13 16 macro

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