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Searched refs:PWRCL_REG_OFFSET (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-6.6/drivers/clk/qcom/
H A Dclk-cpu-8996.c78 #define PWRCL_REG_OFFSET 0x0 macro
132 .offset = PWRCL_REG_OFFSET,
230 .offset = PWRCL_REG_OFFSET + ALT_PLL_OFFSET,
342 .reg = PWRCL_REG_OFFSET + MUX_OFFSET,
384 .reg = PWRCL_REG_OFFSET + MUX_OFFSET,
445 regmap_write(regmap, PWRCL_REG_OFFSET + MUX_OFFSET, 0xc); in qcom_cpu_clk_msm8996_register_clks()
451 regmap_update_bits(regmap, PWRCL_REG_OFFSET + MUX_OFFSET, in qcom_cpu_clk_msm8996_register_clks()
467 regmap_update_bits(regmap, PWRCL_REG_OFFSET + CLK_CTL_OFFSET, in qcom_cpu_clk_msm8996_register_clks()
478 regmap_write(regmap, PWRCL_REG_OFFSET + PSCTL_OFFSET, 0x00030005); in qcom_cpu_clk_msm8996_register_clks()
482 regmap_write(regmap, PWRCL_REG_OFFSET in qcom_cpu_clk_msm8996_register_clks()
[all...]
/kernel/linux/linux-5.10/drivers/clk/qcom/
H A Dclk-cpu-8996.c72 #define PWRCL_REG_OFFSET 0x0 macro
127 .offset = PWRCL_REG_OFFSET,
171 .offset = PWRCL_REG_OFFSET + ALT_PLL_OFFSET,
257 .reg = PWRCL_REG_OFFSET + MUX_OFFSET,
289 .reg = PWRCL_REG_OFFSET + MUX_OFFSET,
444 writel(0xf, base + PWRCL_REG_OFFSET + SSSCTL_OFFSET); in qcom_cpu_clk_msm8996_acd_init()

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