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Searched refs:PRIV_REG_INT_ENABLE (Results 1 - 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dcikd.h1335 # define PRIV_REG_INT_ENABLE (1 << 23) macro
1368 # define PRIV_REG_INT_ENABLE (1 << 23) macro
H A Dcik.c7050 cp_int_cntl |= PRIV_INSTR_INT_ENABLE | PRIV_REG_INT_ENABLE; in cik_irq_set()
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dcikd.h1335 # define PRIV_REG_INT_ENABLE (1 << 23) macro
1368 # define PRIV_REG_INT_ENABLE (1 << 23) macro
H A Dcik.c7039 cp_int_cntl |= PRIV_INSTR_INT_ENABLE | PRIV_REG_INT_ENABLE; in cik_irq_set()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c2770 PRIV_REG_INT_ENABLE, in gfx_v9_4_3_set_priv_reg_fault_state()
H A Dgfx_v9_0.c5788 PRIV_REG_INT_ENABLE, in gfx_v9_0_set_priv_reg_fault_state()
H A Dgfx_v8_0.c6473 WREG32_FIELD(CP_INT_CNTL_RING0, PRIV_REG_INT_ENABLE, in gfx_v8_0_set_priv_reg_fault_state()
H A Dgfx_v11_0.c5911 PRIV_REG_INT_ENABLE, in gfx_v11_0_set_priv_reg_fault_state()
H A Dgfx_v10_0.c8962 PRIV_REG_INT_ENABLE, in gfx_v10_0_set_priv_reg_fault_state()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c5721 PRIV_REG_INT_ENABLE, in gfx_v9_0_set_priv_reg_fault_state()
H A Dgfx_v8_0.c6501 WREG32_FIELD(CP_INT_CNTL_RING0, PRIV_REG_INT_ENABLE, in gfx_v8_0_set_priv_reg_fault_state()
H A Dgfx_v10_0.c8389 PRIV_REG_INT_ENABLE, in gfx_v10_0_set_priv_reg_fault_state()

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