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Help
Searched
refs:PLL_DIVF1_MASK
(Results
1 - 2
of
2
) sorted by relevance
/kernel/linux/linux-5.10/drivers/clk/imx/
H
A
D
clk-sscg-pll.c
26
#define
PLL_DIVF1_MASK
GENMASK(18, 13)
macro
337
divf1 = FIELD_GET(
PLL_DIVF1_MASK
, val);
in clk_sscg_pll_recalc_rate()
372
val &= ~(
PLL_DIVF1_MASK
| PLL_DIVF2_MASK);
in clk_sscg_pll_set_rate()
374
val |= FIELD_PREP(
PLL_DIVF1_MASK
, setup->divf1);
in clk_sscg_pll_set_rate()
/kernel/linux/linux-6.6/drivers/clk/imx/
H
A
D
clk-sscg-pll.c
26
#define
PLL_DIVF1_MASK
GENMASK(18, 13)
macro
337
divf1 = FIELD_GET(
PLL_DIVF1_MASK
, val);
in clk_sscg_pll_recalc_rate()
372
val &= ~(
PLL_DIVF1_MASK
| PLL_DIVF2_MASK);
in clk_sscg_pll_set_rate()
374
val |= FIELD_PREP(
PLL_DIVF1_MASK
, setup->divf1);
in clk_sscg_pll_set_rate()
Completed in 2 milliseconds