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Help
Searched
refs:PLL_CTL0_SEL
(Results
1 - 2
of
2
) sorted by relevance
/kernel/linux/linux-5.10/drivers/net/mdio/
H
A
D
mdio-mux-meson-g12a.c
23
#define
PLL_CTL0_SEL
BIT(23)
macro
270
mux->shift = __ffs(
PLL_CTL0_SEL
);
in g12a_ephy_glue_clk_register()
271
mux->mask =
PLL_CTL0_SEL
>> mux->shift;
in g12a_ephy_glue_clk_register()
/kernel/linux/linux-6.6/drivers/net/mdio/
H
A
D
mdio-mux-meson-g12a.c
23
#define
PLL_CTL0_SEL
BIT(23)
macro
262
mux->shift = __ffs(
PLL_CTL0_SEL
);
in g12a_ephy_glue_clk_register()
263
mux->mask =
PLL_CTL0_SEL
>> mux->shift;
in g12a_ephy_glue_clk_register()
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