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Searched refs:PLL4 (Results 1 - 25 of 27) sorted by relevance

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/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dqcom,lcc-ipq806x.h9 #define PLL4 0 macro
H A Dqcom,lcc-mdm9615.h11 #define PLL4 0 macro
H A Dqcom,lcc-msm8960.h9 #define PLL4 0 macro
H A Dstm32mp1-clks.h186 #define PLL4 179 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A Dqcom,lcc-ipq806x.h9 #define PLL4 0 macro
H A Dqcom,lcc-mdm9615.h11 #define PLL4 0 macro
H A Dqcom,lcc-msm8960.h9 #define PLL4 0 macro
H A Dstm32mp1-clks.h186 #define PLL4 179 macro
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A Dqcom,lcc-ipq806x.h9 #define PLL4 0 macro
H A Dqcom,lcc-msm8960.h9 #define PLL4 0 macro
H A Dstm32mp1-clks.h186 #define PLL4 179 macro
H A Dstm32mp13-clks.h22 #define PLL4 9 macro
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dqcom,lcc-ipq806x.h9 #define PLL4 0 macro
H A Dqcom,lcc-msm8960.h9 #define PLL4 0 macro
H A Dstm32mp1-clks.h186 #define PLL4 179 macro
H A Dstm32mp13-clks.h22 #define PLL4 9 macro
/kernel/linux/linux-5.10/drivers/clk/qcom/
H A Dlcc-ipq806x.c394 [PLL4] = &pll4.clkr,
437 /* Configure the rate of PLL4 if the bootloader hasn't already */ in lcc_ipq806x_probe()
441 /* Enable PLL4 source on the LPASS Primary PLL Mux */ in lcc_ipq806x_probe()
H A Dlcc-mdm9615.c481 [PLL4] = &pll4.clkr,
544 /* Use the correct frequency plan depending on speed of PLL4 */ in lcc_mdm9615_probe()
555 /* Enable PLL4 source on the LPASS Primary PLL Mux */ in lcc_mdm9615_probe()
H A Dlcc-msm8960.c479 [PLL4] = &pll4.clkr,
543 /* Use the correct frequency plan depending on speed of PLL4 */ in lcc_msm8960_probe()
554 /* Enable PLL4 source on the LPASS Primary PLL Mux */ in lcc_msm8960_probe()
/kernel/linux/linux-6.6/drivers/clk/qcom/
H A Dlcc-ipq806x.c401 [PLL4] = &pll4.clkr,
450 /* Configure the rate of PLL4 if the bootloader hasn't already */ in lcc_ipq806x_probe()
454 /* Enable PLL4 source on the LPASS Primary PLL Mux */ in lcc_ipq806x_probe()
H A Dlcc-msm8960.c397 [PLL4] = &pll4.clkr,
470 /* Use the correct frequency plan depending on speed of PLL4 */ in lcc_msm8960_probe()
481 /* Enable PLL4 source on the LPASS Primary PLL Mux */ in lcc_msm8960_probe()
/kernel/linux/linux-5.10/drivers/clk/
H A Dclk-stm32mp1.c1689 PLL(PLL4, "pll4", "ref4", CLK_IGNORE_UNUSED, RCC_PLL4CR),
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/
H A Dreg.h1377 #define PLL4 0x1618c macro
/kernel/linux/linux-6.6/drivers/net/wireless/ath/ath9k/
H A Dreg.h1377 #define PLL4 0x1618c macro
/kernel/linux/linux-6.6/drivers/clk/
H A Dclk-stm32mp1.c1776 PLL(PLL4, "pll4", ref4_parents, 0, RCC_PLL4CR, RCC_RCK4SELR),

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