Searched refs:PHY_TST_CTRL0 (Results 1 - 5 of 5) sorted by relevance
| /kernel/linux/linux-6.6/drivers/gpu/drm/sprd/ |
| H A D | sprd_dsi.c | 123 #define PHY_TST_CTRL0 0xF0 macro
175 dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, PHY_TESTCLK); in regmap_tst_io_write()
176 dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, 0); in regmap_tst_io_write()
179 dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, PHY_TESTCLK); in regmap_tst_io_write()
180 dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, 0); in regmap_tst_io_write()
196 dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, PHY_TESTCLK); in regmap_tst_io_read()
197 dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLK, 0); in regmap_tst_io_read()
752 dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLR, 0); in sprd_dphy_init()
753 dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCLR, PHY_TESTCLR); in sprd_dphy_init()
754 dsi_reg_up(ctx, PHY_TST_CTRL0, PHY_TESTCL in sprd_dphy_init()
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/hisilicon/kirin/ |
| H A D | dw_drm_dsi.c | 319 writel(0x02, base + PHY_TST_CTRL0); in dsi_phy_tst_set()
320 writel(0x00, base + PHY_TST_CTRL0); in dsi_phy_tst_set()
326 writel(0x02, base + PHY_TST_CTRL0); in dsi_phy_tst_set()
327 writel(0x00, base + PHY_TST_CTRL0); in dsi_phy_tst_set()
378 writel(0, base + PHY_TST_CTRL0); in dsi_set_mipi_phy()
379 writel(1, base + PHY_TST_CTRL0); in dsi_set_mipi_phy()
380 writel(0, base + PHY_TST_CTRL0); in dsi_set_mipi_phy()
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| H A D | dw_dsi_reg.h | 24 #define PHY_TST_CTRL0 0xB4 /* D-PHY test interface control 0 */ macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/hisilicon/kirin/ |
| H A D | dw_drm_dsi.c | 320 writel(0x02, base + PHY_TST_CTRL0); in dsi_phy_tst_set()
321 writel(0x00, base + PHY_TST_CTRL0); in dsi_phy_tst_set()
327 writel(0x02, base + PHY_TST_CTRL0); in dsi_phy_tst_set()
328 writel(0x00, base + PHY_TST_CTRL0); in dsi_phy_tst_set()
379 writel(0, base + PHY_TST_CTRL0); in dsi_set_mipi_phy()
380 writel(1, base + PHY_TST_CTRL0); in dsi_set_mipi_phy()
381 writel(0, base + PHY_TST_CTRL0); in dsi_set_mipi_phy()
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| H A D | dw_dsi_reg.h | 24 #define PHY_TST_CTRL0 0xB4 /* D-PHY test interface control 0 */ macro
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