PHY_TMR_CFG (reference) in projects: kernel

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/kernel/linux/linux-5.10/drivers/gpu/drm/hisilicon/kirin/
H A D	dw_dsi_reg.h	`55 #define PHY_TMR_CFG 0x9C /* Data lanes timing configuration */ macro`
H A D	dw_drm_dsi.c	`351 dw_update_bits(base + PHY_TMR_CFG, 24, MASK(8), phy->hs2lp_time); in dsi_set_phy_timer() 352 dw_update_bits(base + PHY_TMR_CFG, 16, MASK(8), phy->lp2hs_time); in dsi_set_phy_timer()`
/kernel/linux/linux-6.6/drivers/gpu/drm/hisilicon/kirin/
H A D	dw_dsi_reg.h	`55 #define PHY_TMR_CFG 0x9C /* Data lanes timing configuration */ macro`
H A D	dw_drm_dsi.c	`352 dw_update_bits(base + PHY_TMR_CFG, 24, MASK(8), phy->hs2lp_time); in dsi_set_phy_timer() 353 dw_update_bits(base + PHY_TMR_CFG, 16, MASK(8), phy->lp2hs_time); in dsi_set_phy_timer()`