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Searched refs:PHASE (Results 1 - 17 of 17) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_clock_source.h60 SRII(PHASE, DP_DTO, 0),\
61 SRII(PHASE, DP_DTO, 1),\
62 SRII(PHASE, DP_DTO, 2),\
63 SRII(PHASE, DP_DTO, 3),\
64 SRII(PHASE, DP_DTO, 4),\
65 SRII(PHASE, DP_DTO, 5),\
81 SRII(PHASE, DP_DTO, 0),\
82 SRII(PHASE, DP_DTO, 1),\
90 SRII(PHASE, DP_DTO, 0),\
91 SRII(PHASE, DP_DT
228 uint32_t PHASE[MAX_PIPES]; global() member
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H A Ddce_clock_source.c978 REG_WRITE(PHASE[inst], e->target_pixel_rate_khz * e->mult_factor); in dcn31_program_pix_clk()
982 REG_WRITE(PHASE[inst], pll_settings->actual_pix_clk_100hz * 100); in dcn31_program_pix_clk()
1089 clock_hz = REG_READ(PHASE[inst]); in get_pixel_clk_frequency_100hz()
1105 * programmed equal to DPREFCLK, in which case PHASE will be in get_pixel_clk_frequency_100hz()
1199 REG_WRITE(PHASE[inst], pixel_clk); in dcn20_override_dp_pix_clk()
1229 REG_WRITE(PHASE[inst], e->target_pixel_rate_khz * e->mult_factor); in dcn3_program_pix_clk()
1233 REG_WRITE(PHASE[inst], pll_settings->actual_pix_clk_100hz * 100); in dcn3_program_pix_clk()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_clock_source.h60 SRII(PHASE, DP_DTO, 0),\
61 SRII(PHASE, DP_DTO, 1),\
62 SRII(PHASE, DP_DTO, 2),\
63 SRII(PHASE, DP_DTO, 3),\
64 SRII(PHASE, DP_DTO, 4),\
65 SRII(PHASE, DP_DTO, 5),\
81 SRII(PHASE, DP_DTO, 0),\
82 SRII(PHASE, DP_DTO, 1),\
83 SRII(PHASE, DP_DTO, 2),\
84 SRII(PHASE, DP_DT
169 uint32_t PHASE[MAX_PIPES]; global() member
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H A Ddce_clock_source.c931 REG_WRITE(PHASE[inst], clock_100hz); in dce112_program_pix_clk()
1010 clock_hz = REG_READ(PHASE[inst]); in get_pixel_clk_frequency_100hz()
1013 * programmed equal to DPREFCLK, in which case PHASE will be in get_pixel_clk_frequency_100hz()
1108 REG_WRITE(PHASE[inst], e->target_pixel_rate_khz * e->mult_factor); in dcn3_program_pix_clk()
1112 REG_WRITE(PHASE[inst], pll_settings->actual_pix_clk_100hz * 100); in dcn3_program_pix_clk()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_dccg.h53 DCCG_SRII(PHASE, DTBCLK_DTO, 0),\
54 DCCG_SRII(PHASE, DTBCLK_DTO, 1),\
55 DCCG_SRII(PHASE, DTBCLK_DTO, 2),\
56 DCCG_SRII(PHASE, DTBCLK_DTO, 3),\
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dccg.h60 DCCG_SRII(PHASE, DTBCLK_DTO, 0),\
61 DCCG_SRII(PHASE, DTBCLK_DTO, 1),\
62 DCCG_SRII(PHASE, DTBCLK_DTO, 2),\
63 DCCG_SRII(PHASE, DTBCLK_DTO, 3),\
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv50/
H A Dhead917d.c44 NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in head917d_dither()
H A Dheadc37d.c100 NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in headc37d_dither()
H A Dhead507d.c62 NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in head507d_dither()
H A Dhead907d.c91 NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in head907d_dither()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/dispnv50/
H A Dhead917d.c44 NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in head917d_dither()
H A Dheadc37d.c100 NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in headc37d_dither()
H A Dhead507d.c62 NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in head507d_dither()
H A Dhead907d.c91 NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in head907d_dither()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.h182 SRII_ARR_2(PHASE, DP_DTO, 0, index), \
183 SRII_ARR_2(PHASE, DP_DTO, 1, index), \
184 SRII_ARR_2(PHASE, DP_DTO, 2, index), \
185 SRII_ARR_2(PHASE, DP_DTO, 3, index), \
1298 DCCG_SRII(PHASE, DTBCLK_DTO, 0), DCCG_SRII(PHASE, DTBCLK_DTO, 1), \
1299 DCCG_SRII(PHASE, DTBCLK_DTO, 2), DCCG_SRII(PHASE, DTBCLK_DTO, 3), \
/kernel/linux/linux-5.10/drivers/scsi/
H A DFlashPoint.c527 #define PHASE BIT(13) macro
1838 && !((RDW_HARPOON((ioport + hp_intstat)) & PHASE) in FlashPoint_HandleInterrupt()
1865 (PROG_HLT | RSEL | PHASE | BUS_FREE)); in FlashPoint_HandleInterrupt()
1901 (PHASE | IUNKWN | PROG_HLT)); in FlashPoint_HandleInterrupt()
2089 (PROG_HLT | TIMEOUT | SEL | BUS_FREE | PHASE | in FPT_SccbMgr_bad_isr()
2677 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_sres()
2682 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_sres()
2755 (PHASE | RESET)) in FPT_sres()
2837 while (!(RDW_HARPOON((port + hp_intstat)) & (PHASE | RESET)) && in FPT_sres()
2847 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_SendMsg()
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/kernel/linux/linux-6.6/drivers/scsi/
H A DFlashPoint.c499 #define PHASE BIT(13) macro
1806 && !((RDW_HARPOON((ioport + hp_intstat)) & PHASE) in FlashPoint_HandleInterrupt()
1833 (PROG_HLT | RSEL | PHASE | BUS_FREE)); in FlashPoint_HandleInterrupt()
1869 (PHASE | IUNKWN | PROG_HLT)); in FlashPoint_HandleInterrupt()
2057 (PROG_HLT | TIMEOUT | SEL | BUS_FREE | PHASE | in FPT_SccbMgr_bad_isr()
2645 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_sres()
2650 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_sres()
2723 (PHASE | RESET)) in FPT_sres()
2805 while (!(RDW_HARPOON((port + hp_intstat)) & (PHASE | RESET)) && in FPT_sres()
2815 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_SendMsg()
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