Searched refs:PESDR0_PLLLCT1 (Results 1 - 4 of 4) sorted by relevance
| /kernel/linux/linux-5.10/arch/powerpc/platforms/4xx/ |
| H A D | pci.h | 163 #define PESDR0_PLLLCT1 0x03a0 macro
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| H A D | pci.c | 735 if (!(mfdcri(SDR0, PESDR0_PLLLCT1) & 0x01000000)) { in ppc440spe_pciex_check_reset()
809 dcri_clrset(SDR0, PESDR0_PLLLCT1, 0, 1 << 28); in ppc440spe_pciex_core_init()
823 dcri_clrset(SDR0, PESDR0_PLLLCT1, 1 << 24, 0); in ppc440spe_pciex_core_init()
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| /kernel/linux/linux-6.6/arch/powerpc/platforms/4xx/ |
| H A D | pci.h | 163 #define PESDR0_PLLLCT1 0x03a0 macro
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| H A D | pci.c | 733 if (!(mfdcri(SDR0, PESDR0_PLLLCT1) & 0x01000000)) { in ppc440spe_pciex_check_reset()
807 dcri_clrset(SDR0, PESDR0_PLLLCT1, 0, 1 << 28); in ppc440spe_pciex_core_init()
821 dcri_clrset(SDR0, PESDR0_PLLLCT1, 1 << 24, 0); in ppc440spe_pciex_core_init()
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