Home
last modified time | relevance | path

Searched refs:PE (Results 1 - 24 of 24) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/freescale/
H A Dpinctrl-imx27.c23 #define PE 4 macro
150 MX27_PAD_USBOTG_NXT = PAD_ID(PE, 0),
151 MX27_PAD_USBOTG_STP = PAD_ID(PE, 1),
152 MX27_PAD_USBOTG_DIR = PAD_ID(PE, 2),
153 MX27_PAD_UART2_CTS = PAD_ID(PE, 3),
154 MX27_PAD_UART2_RTS = PAD_ID(PE, 4),
155 MX27_PAD_PWMO = PAD_ID(PE, 5),
156 MX27_PAD_UART2_TXD = PAD_ID(PE, 6),
157 MX27_PAD_UART2_RXD = PAD_ID(PE, 7),
158 MX27_PAD_UART3_TXD = PAD_ID(PE,
[all...]
H A Dpinctrl-imx21.c19 #define PE 4 macro
120 MX21_PAD_TEST_WB2 = PAD_ID(PE, 0),
121 MX21_PAD_TEST_WB1 = PAD_ID(PE, 1),
122 MX21_PAD_TEST_WB0 = PAD_ID(PE, 2),
123 MX21_PAD_UART2_CTS = PAD_ID(PE, 3),
124 MX21_PAD_UART2_RTS = PAD_ID(PE, 4),
125 MX21_PAD_PWMO = PAD_ID(PE, 5),
126 MX21_PAD_UART2_TXD = PAD_ID(PE, 6),
127 MX21_PAD_UART2_RXD = PAD_ID(PE, 7),
128 MX21_PAD_UART3_TXD = PAD_ID(PE,
[all...]
/kernel/linux/linux-6.6/drivers/pinctrl/freescale/
H A Dpinctrl-imx27.c23 #define PE 4 macro
150 MX27_PAD_USBOTG_NXT = PAD_ID(PE, 0),
151 MX27_PAD_USBOTG_STP = PAD_ID(PE, 1),
152 MX27_PAD_USBOTG_DIR = PAD_ID(PE, 2),
153 MX27_PAD_UART2_CTS = PAD_ID(PE, 3),
154 MX27_PAD_UART2_RTS = PAD_ID(PE, 4),
155 MX27_PAD_PWMO = PAD_ID(PE, 5),
156 MX27_PAD_UART2_TXD = PAD_ID(PE, 6),
157 MX27_PAD_UART2_RXD = PAD_ID(PE, 7),
158 MX27_PAD_UART3_TXD = PAD_ID(PE,
[all...]
/kernel/linux/linux-5.10/arch/arm/boot/compressed/
H A Defi-header.S19 @ PE/COFF signature "MZ" in the first two bytes, so the kernel
36 @ The PE header can be anywhere in the file, but for
38 @ The offset to the PE/COFF header needs to be at offset
41 @ PE/COFF offset, and the "MZ" bytes at offset 0x0.
43 .long pe_header - start @ Offset to the PE header.
/kernel/linux/linux-6.6/arch/arm/boot/compressed/
H A Defi-header.S19 @ PE/COFF signature "MZ" in the first two bytes, so the kernel
36 @ The PE header can be anywhere in the file, but for
38 @ The offset to the PE/COFF header needs to be at offset
41 @ PE/COFF offset, and the "MZ" bytes at offset 0x0.
43 .long pe_header - start @ Offset to the PE header.
/kernel/linux/linux-5.10/arch/m68k/include/asm/
H A DMC68328.h538 #define PE(x) (1 << (x)) macro
540 #define PE_CSA1 PE(1) /* Use CSA1 as PE(1) */
541 #define PE_CSA2 PE(2) /* Use CSA2 as PE(2) */
542 #define PE_CSA3 PE(3) /* Use CSA3 as PE(3) */
543 #define PE_CSB0 PE(4) /* Use CSB0 as PE(4) */
544 #define PE_CSB1 PE(
[all...]
H A DMC68VZ328.h458 #define PE(x) (1 << (x)) macro
460 #define PE_SPMTXD 0x01 /* Use SPMTXD as PE[0] */
461 #define PE_SPMRXD 0x02 /* Use SPMRXD as PE[1] */
462 #define PE_SPMCLK 0x04 /* Use SPMCLK as PE[2] */
463 #define PE_DWE 0x08 /* Use DWE as PE[3] */
464 #define PE_RXD 0x10 /* Use RXD as PE[4] */
465 #define PE_TXD 0x20 /* Use TXD as PE[5] */
466 #define PE_RTS 0x40 /* Use RTS as PE[6] */
467 #define PE_CTS 0x80 /* Use CTS as PE[7] */
H A DMC68EZ328.h449 #define PE(x) (1 << (x)) macro
451 #define PE_SPMTXD 0x01 /* Use SPMTXD as PE[0] */
452 #define PE_SPMRXD 0x02 /* Use SPMRXD as PE[1] */
453 #define PE_SPMCLK 0x04 /* Use SPMCLK as PE[2] */
454 #define PE_DWE 0x08 /* Use DWE as PE[3] */
455 #define PE_RXD 0x10 /* Use RXD as PE[4] */
456 #define PE_TXD 0x20 /* Use TXD as PE[5] */
457 #define PE_RTS 0x40 /* Use RTS as PE[6] */
458 #define PE_CTS 0x80 /* Use CTS as PE[7] */
/kernel/linux/linux-6.6/arch/m68k/include/asm/
H A DMC68328.h538 #define PE(x) (1 << (x)) macro
540 #define PE_CSA1 PE(1) /* Use CSA1 as PE(1) */
541 #define PE_CSA2 PE(2) /* Use CSA2 as PE(2) */
542 #define PE_CSA3 PE(3) /* Use CSA3 as PE(3) */
543 #define PE_CSB0 PE(4) /* Use CSB0 as PE(4) */
544 #define PE_CSB1 PE(
[all...]
H A DMC68VZ328.h458 #define PE(x) (1 << (x)) macro
460 #define PE_SPMTXD 0x01 /* Use SPMTXD as PE[0] */
461 #define PE_SPMRXD 0x02 /* Use SPMRXD as PE[1] */
462 #define PE_SPMCLK 0x04 /* Use SPMCLK as PE[2] */
463 #define PE_DWE 0x08 /* Use DWE as PE[3] */
464 #define PE_RXD 0x10 /* Use RXD as PE[4] */
465 #define PE_TXD 0x20 /* Use TXD as PE[5] */
466 #define PE_RTS 0x40 /* Use RTS as PE[6] */
467 #define PE_CTS 0x80 /* Use CTS as PE[7] */
H A DMC68EZ328.h449 #define PE(x) (1 << (x)) macro
451 #define PE_SPMTXD 0x01 /* Use SPMTXD as PE[0] */
452 #define PE_SPMRXD 0x02 /* Use SPMRXD as PE[1] */
453 #define PE_SPMCLK 0x04 /* Use SPMCLK as PE[2] */
454 #define PE_DWE 0x08 /* Use DWE as PE[3] */
455 #define PE_RXD 0x10 /* Use RXD as PE[4] */
456 #define PE_TXD 0x20 /* Use TXD as PE[5] */
457 #define PE_RTS 0x40 /* Use RTS as PE[6] */
458 #define PE_CTS 0x80 /* Use CTS as PE[7] */
/kernel/linux/linux-5.10/arch/x86/realmode/rm/
H A Dtrampoline_64.S73 movl $X86_CR0_PE, %eax # protected mode (PE) bit
/kernel/linux/linux-5.10/arch/x86/boot/
H A Dheader.S85 # Offset to the PE header.
141 # PE specification requires ImageBase to be 64k aligned
/kernel/linux/linux-6.6/arch/x86/boot/
H A Dheader.S49 # Offset to the PE header.
179 .word IMAGE_FILE_MACHINE_I386 # PE machine type
/kernel/linux/linux-6.6/arch/x86/kernel/
H A Dhead_32.S282 andl $0x80000011,%eax # Save PG,PE,ET
/kernel/linux/linux-5.10/arch/x86/kernel/
H A Dhead_32.S306 andl $0x80000011,%eax # Save PG,PE,ET
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
H A Dbcm3510_priv.h301 u8 PE :1; /* baud clock pin */ member
/kernel/linux/linux-6.6/drivers/media/dvb-frontends/
H A Dbcm3510_priv.h301 u8 PE :1; /* baud clock pin */ member
/kernel/linux/linux-5.10/drivers/tty/
H A Dsynclinkmp.c437 #define PE BIT5 macro
2153 if ( status & (PE + FRME + OVRN) ) { in isr_rxrdy()
2158 if (status & PE) in isr_rxrdy()
2171 if (status & PE) in isr_rxrdy()
2805 info->read_status_mask2 |= PE | FRME; in change_params()
2809 info->ignore_status_mask2 |= PE | FRME; in change_params()
/kernel/linux/linux-5.10/drivers/pinctrl/tegra/
H A Dpinctrl-tegra124.c1978 PINGROUP(pex_wake_n_pdd3, PE, RSVD2, RSVD3, RSVD4, 0x33c4, N, N, N),
H A Dpinctrl-tegra210.c1369 PINGROUP(pex_wake_n_pa2, PE, RSVD1, RSVD2, RSVD3, 0x3040, N, N, Y, 0xa68, 12, 5, 20, 5, -1, -1, -1, -1),
/kernel/linux/linux-6.6/drivers/pinctrl/tegra/
H A Dpinctrl-tegra124.c1975 PINGROUP(pex_wake_n_pdd3, PE, RSVD2, RSVD3, RSVD4, 0x33c4, N, N, N),
H A Dpinctrl-tegra210.c1368 PINGROUP(pex_wake_n_pa2, PE, RSVD1, RSVD2, RSVD3, 0x3040, N, N, Y, Y, 0xa68, 12, 5, 20, 5, -1, -1, -1, -1),
/kernel/linux/linux-5.10/drivers/pinctrl/sirf/
H A Dpinctrl-atlas7.c103 #define PE BIT(0) macro
128 /* Pull Options for M31 Pad PE */
130 #define PM31_PULL_ENABLED (PE) /* 1 */

Completed in 52 milliseconds