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Searched refs:PDAUDIOCF_REG_SCR (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/sound/pcmcia/pdaudiocf/
H A Dpdaudiocf_core.c27 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { in pdacf_ak4117_read()
37 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { in pdacf_ak4117_read()
58 while (inw(chip->port + PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { in pdacf_ak4117_write()
81 inw(chip->port + PDAUDIOCF_REG_SCR));
95 val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); in pdacf_reset()
98 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); in pdacf_reset()
101 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); in pdacf_reset()
104 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); in pdacf_reset()
108 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); in pdacf_reset()
118 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, chi in pdacf_reinit()
[all...]
H A Dpdaudiocf_pcm.c69 tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); in pdacf_pcm_trigger()
79 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, tmp); in pdacf_pcm_trigger()
113 val = nval = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); in pdacf_pcm_prepare()
145 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, nval); in pdacf_pcm_prepare()
H A Dpdaudiocf.h24 #define PDAUDIOCF_REG_SCR 0x08 /* status and control, R/W (see bit description) */ macro
33 /* PDAUDIOCF_REG_SCR */
/kernel/linux/linux-6.6/sound/pcmcia/pdaudiocf/
H A Dpdaudiocf_core.c27 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { in pdacf_ak4117_read()
37 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { in pdacf_ak4117_read()
58 while (inw(chip->port + PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) { in pdacf_ak4117_write()
81 inw(chip->port + PDAUDIOCF_REG_SCR));
95 val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); in pdacf_reset()
98 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); in pdacf_reset()
101 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); in pdacf_reset()
104 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); in pdacf_reset()
108 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val); in pdacf_reset()
118 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, chi in pdacf_reinit()
[all...]
H A Dpdaudiocf_pcm.c69 tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); in pdacf_pcm_trigger()
79 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, tmp); in pdacf_pcm_trigger()
113 val = nval = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR); in pdacf_pcm_prepare()
145 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, nval); in pdacf_pcm_prepare()
H A Dpdaudiocf.h24 #define PDAUDIOCF_REG_SCR 0x08 /* status and control, R/W (see bit description) */ macro
33 /* PDAUDIOCF_REG_SCR */

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