/kernel/linux/linux-5.10/drivers/pinctrl/freescale/ |
H A D | pinctrl-imx1.c | 18 #define PD 3 macro 105 MX1_PAD_LSCLK = PAD_ID(PD, 6), 106 MX1_PAD_REV = PAD_ID(PD, 7), 107 MX1_PAD_CLS = PAD_ID(PD, 8), 108 MX1_PAD_PS = PAD_ID(PD, 9), 109 MX1_PAD_SPL_SPR = PAD_ID(PD, 10), 110 MX1_PAD_CONTRAST = PAD_ID(PD, 11), 111 MX1_PAD_ACD_OE = PAD_ID(PD, 12), 112 MX1_PAD_LP_HSYNC = PAD_ID(PD, 13), 113 MX1_PAD_FLM_VSYNC = PAD_ID(PD, 1 [all...] |
H A D | pinctrl-imx27.c | 22 #define PD 3 macro 117 MX27_PAD_SD3_CMD = PAD_ID(PD, 0), 118 MX27_PAD_SD3_CLK = PAD_ID(PD, 1), 119 MX27_PAD_ATA_DATA0 = PAD_ID(PD, 2), 120 MX27_PAD_ATA_DATA1 = PAD_ID(PD, 3), 121 MX27_PAD_ATA_DATA2 = PAD_ID(PD, 4), 122 MX27_PAD_ATA_DATA3 = PAD_ID(PD, 5), 123 MX27_PAD_ATA_DATA4 = PAD_ID(PD, 6), 124 MX27_PAD_ATA_DATA5 = PAD_ID(PD, 7), 125 MX27_PAD_ATA_DATA6 = PAD_ID(PD, [all...] |
H A D | pinctrl-imx21.c | 18 #define PD 3 macro 105 MX21_PAD_I2C_DATA = PAD_ID(PD, 17), 106 MX21_PAD_I2C_CLK = PAD_ID(PD, 18), 107 MX21_PAD_CSPI2_SS2 = PAD_ID(PD, 19), 108 MX21_PAD_CSPI2_SS1 = PAD_ID(PD, 20), 109 MX21_PAD_CSPI2_SS0 = PAD_ID(PD, 21), 110 MX21_PAD_CSPI2_SCLK = PAD_ID(PD, 22), 111 MX21_PAD_CSPI2_MISO = PAD_ID(PD, 23), 112 MX21_PAD_CSPI2_MOSI = PAD_ID(PD, 24), 113 MX21_PAD_CSPI1_RDY = PAD_ID(PD, 2 [all...] |
/kernel/linux/linux-6.6/drivers/pinctrl/freescale/ |
H A D | pinctrl-imx1.c | 18 #define PD 3 macro 105 MX1_PAD_LSCLK = PAD_ID(PD, 6), 106 MX1_PAD_REV = PAD_ID(PD, 7), 107 MX1_PAD_CLS = PAD_ID(PD, 8), 108 MX1_PAD_PS = PAD_ID(PD, 9), 109 MX1_PAD_SPL_SPR = PAD_ID(PD, 10), 110 MX1_PAD_CONTRAST = PAD_ID(PD, 11), 111 MX1_PAD_ACD_OE = PAD_ID(PD, 12), 112 MX1_PAD_LP_HSYNC = PAD_ID(PD, 13), 113 MX1_PAD_FLM_VSYNC = PAD_ID(PD, 1 [all...] |
H A D | pinctrl-imx27.c | 22 #define PD 3 macro 117 MX27_PAD_SD3_CMD = PAD_ID(PD, 0), 118 MX27_PAD_SD3_CLK = PAD_ID(PD, 1), 119 MX27_PAD_ATA_DATA0 = PAD_ID(PD, 2), 120 MX27_PAD_ATA_DATA1 = PAD_ID(PD, 3), 121 MX27_PAD_ATA_DATA2 = PAD_ID(PD, 4), 122 MX27_PAD_ATA_DATA3 = PAD_ID(PD, 5), 123 MX27_PAD_ATA_DATA4 = PAD_ID(PD, 6), 124 MX27_PAD_ATA_DATA5 = PAD_ID(PD, 7), 125 MX27_PAD_ATA_DATA6 = PAD_ID(PD, [all...] |
/kernel/linux/linux-6.6/arch/m68k/68000/ |
H A D | dragen2.c | 69 PDPOL &= ~PD(1); /* active high signal */ in init_dragen2() 70 PDIQEG &= ~PD(1); in init_dragen2() 71 PDIRQEN |= PD(1); /* IRQ enabled */ in init_dragen2()
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/kernel/linux/linux-5.10/arch/m68k/68000/ |
H A D | m68VZ328.c | 90 PDPOL &= ~PD(1); /* active high signal */ in init_hardware() 91 PDIQEG &= ~PD(1); in init_hardware() 92 PDIRQEN |= PD(1); /* IRQ enabled */ in init_hardware()
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/kernel/linux/linux-5.10/drivers/hwmon/ |
H A D | as370-hwmon.c | 17 #define PD BIT(0) macro 36 val = PD; in init_pvt() 42 val &= ~PD; in init_pvt()
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/kernel/linux/linux-6.6/drivers/hwmon/ |
H A D | as370-hwmon.c | 18 #define PD BIT(0) macro 37 val = PD; in init_pvt() 43 val &= ~PD; in init_pvt()
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/kernel/linux/linux-5.10/arch/m68k/include/asm/ |
H A D | MC68328.h | 513 #define PD(x) (1 << (x)) macro 514 #define PD_KB(x) PD(x) /* This is specific for Port D only */ 516 #define PD_KB0 PD(0) /* Use KB0 as PD(0) */ 517 #define PD_KB1 PD(1) /* Use KB1 as PD(1) */ 518 #define PD_KB2 PD(2) /* Use KB2 as PD(2) */ 519 #define PD_KB3 PD(3) /* Use KB3 as PD( [all...] |
H A D | MC68VZ328.h | 434 #define PD(x) (1 << (x)) macro 436 #define PD_INT0 0x01 /* Use INT0 as PD[0] */ 437 #define PD_INT1 0x02 /* Use INT1 as PD[1] */ 438 #define PD_INT2 0x04 /* Use INT2 as PD[2] */ 439 #define PD_INT3 0x08 /* Use INT3 as PD[3] */ 440 #define PD_IRQ1 0x10 /* Use IRQ1 as PD[4] */ 441 #define PD_IRQ2 0x20 /* Use IRQ2 as PD[5] */ 442 #define PD_IRQ3 0x40 /* Use IRQ3 as PD[6] */ 443 #define PD_IRQ6 0x80 /* Use IRQ6 as PD[7] */
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H A D | MC68EZ328.h | 425 #define PD(x) (1 << (x)) macro 427 #define PD_INT0 0x01 /* Use INT0 as PD[0] */ 428 #define PD_INT1 0x02 /* Use INT1 as PD[1] */ 429 #define PD_INT2 0x04 /* Use INT2 as PD[2] */ 430 #define PD_INT3 0x08 /* Use INT3 as PD[3] */ 431 #define PD_IRQ1 0x10 /* Use IRQ1 as PD[4] */ 432 #define PD_IRQ2 0x20 /* Use IRQ2 as PD[5] */ 433 #define PD_IRQ3 0x40 /* Use IRQ3 as PD[6] */ 434 #define PD_IRQ6 0x80 /* Use IRQ6 as PD[7] */
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/kernel/linux/linux-6.6/arch/m68k/include/asm/ |
H A D | MC68328.h | 513 #define PD(x) (1 << (x)) macro 514 #define PD_KB(x) PD(x) /* This is specific for Port D only */ 516 #define PD_KB0 PD(0) /* Use KB0 as PD(0) */ 517 #define PD_KB1 PD(1) /* Use KB1 as PD(1) */ 518 #define PD_KB2 PD(2) /* Use KB2 as PD(2) */ 519 #define PD_KB3 PD(3) /* Use KB3 as PD( [all...] |
H A D | MC68VZ328.h | 434 #define PD(x) (1 << (x)) macro 436 #define PD_INT0 0x01 /* Use INT0 as PD[0] */ 437 #define PD_INT1 0x02 /* Use INT1 as PD[1] */ 438 #define PD_INT2 0x04 /* Use INT2 as PD[2] */ 439 #define PD_INT3 0x08 /* Use INT3 as PD[3] */ 440 #define PD_IRQ1 0x10 /* Use IRQ1 as PD[4] */ 441 #define PD_IRQ2 0x20 /* Use IRQ2 as PD[5] */ 442 #define PD_IRQ3 0x40 /* Use IRQ3 as PD[6] */ 443 #define PD_IRQ6 0x80 /* Use IRQ6 as PD[7] */
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H A D | MC68EZ328.h | 425 #define PD(x) (1 << (x)) macro 427 #define PD_INT0 0x01 /* Use INT0 as PD[0] */ 428 #define PD_INT1 0x02 /* Use INT1 as PD[1] */ 429 #define PD_INT2 0x04 /* Use INT2 as PD[2] */ 430 #define PD_INT3 0x08 /* Use INT3 as PD[3] */ 431 #define PD_IRQ1 0x10 /* Use IRQ1 as PD[4] */ 432 #define PD_IRQ2 0x20 /* Use IRQ2 as PD[5] */ 433 #define PD_IRQ3 0x40 /* Use IRQ3 as PD[6] */ 434 #define PD_IRQ6 0x80 /* Use IRQ6 as PD[7] */
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/kernel/linux/linux-5.10/drivers/gpu/drm/gma500/ |
H A D | mid_bios.c | 177 bpi = gct.PD.BootPanelIndex; in mid_get_vbt_data_r0() 179 dev_priv->gct_data.pt = gct.PD.PanelType; in mid_get_vbt_data_r0() 205 bpi = gct.PD.BootPanelIndex; in mid_get_vbt_data_r1() 207 dev_priv->gct_data.pt = gct.PD.PanelType; in mid_get_vbt_data_r1()
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H A D | oaktrail.h | 156 } PD; member 173 } PD; member
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/kernel/linux/linux-6.6/drivers/gpu/drm/gma500/ |
H A D | mid_bios.c | 178 bpi = gct.PD.BootPanelIndex; in mid_get_vbt_data_r0() 180 dev_priv->gct_data.pt = gct.PD.PanelType; in mid_get_vbt_data_r0() 206 bpi = gct.PD.BootPanelIndex; in mid_get_vbt_data_r1() 208 dev_priv->gct_data.pt = gct.PD.PanelType; in mid_get_vbt_data_r1()
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H A D | oaktrail.h | 156 } PD; member 173 } PD; member
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/kernel/linux/linux-6.6/drivers/phy/freescale/ |
H A D | phy-fsl-imx8qm-lvds-phy.c | 33 #define PD BIT(0) macro 405 regmap_write(priv->regmap, PHY_CTRL + REG_SET, PD); in mixel_lvds_phy_runtime_suspend() 418 CTRL_INIT_MASK | PD, CTRL_INIT_VAL); in mixel_lvds_phy_runtime_resume()
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/kernel/linux/linux-5.10/drivers/pinctrl/sirf/ |
H A D | pinctrl-atlas7.c | 102 #define PD BIT(0) macro 115 /* Pull Options for 4WE Pad PUN PD CO */ 117 #define P4WE_PULL_DOWN (PUN | PD) /* 1 1 3 */ 119 #define P4WE_HIGH_HYSTERESIS (PD) /* 0 1 1 */ 122 /* Pull Options for 16ST Pad PUN PD CO */ 124 #define P16ST_PULL_DOWN (PUN | PD) /* 1 1 3 */ 133 /* Pull Options for A/D Pad PUN PD CO */ 135 #define PANGD_PULL_DOWN (PUN | PD) /* 1 1 3 */ 4802 { PD, PULL_UNKNOWN }, 4814 { PD, PULL_UNKNOW [all...] |