PA5_RG_U2_HSTX_SRCAL_EN (reference) in projects: kernel

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/kernel/linux/linux-5.10/drivers/phy/mediatek/
H A D	phy-mtk-tphy.c	`57 #define PA5_RG_U2_HSTX_SRCAL_EN BIT(15) macro 339 tmp \|= PA5_RG_U2_HSTX_SRCAL_EN; in hs_slew_rate_calibrate() 399 tmp &= ~PA5_RG_U2_HSTX_SRCAL_EN; in hs_slew_rate_calibrate()`
/kernel/linux/linux-6.6/drivers/phy/mediatek/
H A D	phy-mtk-tphy.c	`65 #define PA5_RG_U2_HSTX_SRCAL_EN BIT(15) macro 713 mtk_phy_set_bits(com + U3P_USBPHYACR5, PA5_RG_U2_HSTX_SRCAL_EN); in hs_slew_rate_calibrate() 761 mtk_phy_clear_bits(com + U3P_USBPHYACR5, PA5_RG_U2_HSTX_SRCAL_EN); in hs_slew_rate_calibrate()`