| /kernel/linux/linux-5.10/drivers/staging/rtl8192e/rtl8192e/ |
| H A D | r8190P_def.h | 213 u8 OWN:1; member
252 u8 OWN:1; member
278 u8 OWN:1; member
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| H A D | rtl_core.c | 549 pdesc->OWN = 1; in _rtl92e_prepare_beacon()
1673 if (entry->OWN) in _rtl92e_tx_isr()
1755 if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) { in _rtl92e_tx()
1770 pdesc->OWN = 1; in _rtl92e_tx()
1817 entry->OWN = 1; in _rtl92e_alloc_rx_ring()
1893 entry->OWN = 1; in rtl92e_reset_desc_ring()
2020 if (pdesc->OWN) in _rtl92e_rx_normal()
2085 pdesc->OWN = 1; in _rtl92e_rx_normal()
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| /kernel/linux/linux-6.6/drivers/staging/rtl8192e/rtl8192e/ |
| H A D | r8190P_def.h | 183 u8 OWN:1; member
221 u8 OWN:1; member
247 u8 OWN:1; member
|
| H A D | rtl_core.c | 477 pdesc->OWN = 1; in _rtl92e_prepare_beacon()
1445 if (entry->OWN) in _rtl92e_tx_isr()
1514 if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) { in _rtl92e_tx()
1524 pdesc->OWN = 1; in _rtl92e_tx()
1571 entry->OWN = 1; in _rtl92e_alloc_rx_ring()
1647 entry->OWN = 1; in rtl92e_reset_desc_ring()
1767 if (pdesc->OWN) in _rtl92e_rx_normal()
1813 pdesc->OWN = 1; in _rtl92e_rx_normal()
|
| /kernel/linux/linux-5.10/drivers/staging/rtl8712/ |
| H A D | rtl8712_xmit.h | 52 #define OWN BIT(31) macro
|
| H A D | rtl8712_xmit.c | 259 ptx_desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in r8712_construct_txaggr_cmd_desc()
439 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in update_txdesc()
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| H A D | rtl8712_cmd.c | 312 pdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in r8712_cmd_thread()
|
| /kernel/linux/linux-6.6/drivers/staging/rtl8712/ |
| H A D | rtl8712_xmit.h | 50 #define OWN BIT(31) macro
|
| H A D | rtl8712_xmit.c | 259 ptx_desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in r8712_construct_txaggr_cmd_desc()
438 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in update_txdesc()
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| H A D | rtl8712_cmd.c | 312 pdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in r8712_cmd_thread()
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| /kernel/linux/linux-5.10/drivers/staging/rtl8188eu/include/ |
| H A D | rtl8188e_xmit.h | 51 #define OWN BIT(31) macro
|
| /kernel/linux/linux-5.10/arch/x86/include/asm/ |
| H A D | perf_event_p4.h | 645 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, OWN, 13),
657 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, OWN, 13),
|
| /kernel/linux/linux-5.10/drivers/staging/rtl8188eu/hal/ |
| H A D | rtl8188eu_xmit.c | 58 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */ in rtl8188e_fill_fake_txdesc()
181 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in update_txdesc()
|
| /kernel/linux/linux-6.6/arch/x86/include/asm/ |
| H A D | perf_event_p4.h | 645 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, OWN, 13),
657 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, OWN, 13),
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/sis/ |
| H A D | sis900.h | 198 OWN = 0x80000000, MORE = 0x40000000, INTR = 0x20000000, enumerator
|
| H A D | sis900.c | 1628 sis_priv->tx_ring[entry].cmdsts = (OWN | INTR | skb->len); in sis900_start_xmit()
1747 while (rx_status & OWN) { in sis900_rx()
1906 if (tx_status & OWN) { in sis900_finish_xmit()
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/sis/ |
| H A D | sis900.h | 198 OWN = 0x80000000, MORE = 0x40000000, INTR = 0x20000000, enumerator
|
| H A D | sis900.c | 1635 sis_priv->tx_ring[entry].cmdsts = (OWN | INTR | skb->len); in sis900_start_xmit()
1754 while (rx_status & OWN) { in sis900_rx()
1913 if (tx_status & OWN) { in sis900_finish_xmit()
|
| /kernel/linux/linux-5.10/drivers/staging/rtl8192u/ |
| H A D | r8192U.h | 188 u8 OWN:1; member
226 u8 OWN:1; member
|
| /kernel/linux/linux-6.6/drivers/staging/rtl8192u/ |
| H A D | r8192U.h | 188 u8 OWN:1; member
226 u8 OWN:1; member
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/amd/xgbe/ |
| H A D | xgbe-dev.c | 1379 return !XGMAC_GET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN); in xgbe_tx_complete()
1404 * Reset all other control bits (OWN, CTXT, FD, LD, CPC, CIC, etc) in xgbe_tx_desc_reset()
1470 * set control bits OWN and INTE in xgbe_rx_desc_reset()
1482 * is written to the descriptor(s) before setting the OWN bit in xgbe_rx_desc_reset()
1487 XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN, 1); in xgbe_rx_desc_reset()
1805 /* Set OWN bit if not the first descriptor */ in xgbe_dev_xmit()
1807 XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); in xgbe_dev_xmit()
1852 /* Set OWN bit */ in xgbe_dev_xmit()
1853 XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); in xgbe_dev_xmit()
1879 * is written to the descriptor(s) before setting the OWN bi in xgbe_dev_xmit()
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/amd/xgbe/ |
| H A D | xgbe-dev.c | 1429 return !XGMAC_GET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN); in xgbe_tx_complete()
1454 * Reset all other control bits (OWN, CTXT, FD, LD, CPC, CIC, etc) in xgbe_tx_desc_reset()
1520 * set control bits OWN and INTE in xgbe_rx_desc_reset()
1532 * is written to the descriptor(s) before setting the OWN bit in xgbe_rx_desc_reset()
1537 XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN, 1); in xgbe_rx_desc_reset()
1855 /* Set OWN bit if not the first descriptor */ in xgbe_dev_xmit()
1857 XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); in xgbe_dev_xmit()
1902 /* Set OWN bit */ in xgbe_dev_xmit()
1903 XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); in xgbe_dev_xmit()
1929 * is written to the descriptor(s) before setting the OWN bi in xgbe_dev_xmit()
[all...] |
| /kernel/linux/linux-5.10/arch/x86/events/intel/ |
| H A D | p4.c | 178 P4_ESCR_EMASK_BIT(P4_EVENT_IOQ_ALLOCATION, OWN) |
195 P4_ESCR_EMASK_BIT(P4_EVENT_IOQ_ACTIVE_ENTRIES, OWN) |
|
| /kernel/linux/linux-6.6/arch/x86/events/intel/ |
| H A D | p4.c | 178 P4_ESCR_EMASK_BIT(P4_EVENT_IOQ_ALLOCATION, OWN) |
195 P4_ESCR_EMASK_BIT(P4_EVENT_IOQ_ACTIVE_ENTRIES, OWN) |
|
| /kernel/linux/linux-5.10/drivers/staging/rtl8723bs/include/ |
| H A D | rtl8723b_xmit.h | 30 #define OWN BIT(31) macro
|