/kernel/linux/linux-5.10/drivers/gpu/drm/msm/adreno/ |
H A D | a5xx_gpu.c | 34 OUT_PKT7(ring, CP_WHERE_AM_I, 2); in a5xx_flush() 130 OUT_PKT7(ring, CP_PREEMPT_ENABLE_GLOBAL, 1); in a5xx_submit() 134 OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); in a5xx_submit() 143 OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); in a5xx_submit() 147 OUT_PKT7(ring, CP_PREEMPT_ENABLE_LOCAL, 1); in a5xx_submit() 151 OUT_PKT7(ring, CP_YIELD_ENABLE, 1); in a5xx_submit() 164 OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3); in a5xx_submit() 178 OUT_PKT7(ring, CP_SET_RENDER_MODE, 5); in a5xx_submit() 186 OUT_PKT7(ring, CP_YIELD_ENABLE, 1); in a5xx_submit() 197 OUT_PKT7(rin in a5xx_submit() [all...] |
H A D | a6xx_gpu.c | 63 OUT_PKT7(ring, CP_WHERE_AM_I, 2); in a6xx_flush() 87 OUT_PKT7(ring, CP_REG_TO_MEM, 3); in get_stats_counter() 109 OUT_PKT7(ring, CP_SMMU_TABLE_UPDATE, 4); in a6xx_set_pagetable() 121 OUT_PKT7(ring, CP_MEM_WRITE, 4); in a6xx_set_pagetable() 132 OUT_PKT7(ring, CP_EVENT_WRITE, 1); in a6xx_set_pagetable() 161 OUT_PKT7(ring, CP_EVENT_WRITE, 1); in a6xx_submit() 164 OUT_PKT7(ring, CP_EVENT_WRITE, 1); in a6xx_submit() 177 OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3); in a6xx_submit() 198 OUT_PKT7(ring, CP_EVENT_WRITE, 4); in a6xx_submit() 604 OUT_PKT7(rin in a6xx_cp_init() [all...] |
H A D | a5xx_power.c | 230 OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); in a5xx_gpmu_init() 234 OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3); in a5xx_gpmu_init() 240 OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); in a5xx_gpmu_init()
|
H A D | adreno_gpu.h | 326 OUT_PKT7(struct msm_ringbuffer *ring, uint8_t opcode, uint16_t cnt) in OUT_PKT7() function
|
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/adreno/ |
H A D | a5xx_gpu.c | 27 OUT_PKT7(ring, CP_WHERE_AM_I, 2); in update_shadow_rptr() 137 OUT_PKT7(ring, CP_PREEMPT_ENABLE_GLOBAL, 1); in a5xx_submit() 141 OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); in a5xx_submit() 150 OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); in a5xx_submit() 154 OUT_PKT7(ring, CP_PREEMPT_ENABLE_LOCAL, 1); in a5xx_submit() 158 OUT_PKT7(ring, CP_YIELD_ENABLE, 1); in a5xx_submit() 171 OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3); in a5xx_submit() 195 OUT_PKT7(ring, CP_SET_RENDER_MODE, 5); in a5xx_submit() 203 OUT_PKT7(ring, CP_YIELD_ENABLE, 1); in a5xx_submit() 214 OUT_PKT7(rin in a5xx_submit() [all...] |
H A D | a5xx_power.c | 230 OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); in a5xx_gpmu_init() 234 OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3); in a5xx_gpmu_init() 240 OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); in a5xx_gpmu_init()
|
H A D | a6xx_gpu.c | 62 OUT_PKT7(ring, CP_WHERE_AM_I, 2); in update_shadow_rptr() 94 OUT_PKT7(ring, CP_REG_TO_MEM, 3); in get_stats_counter() 118 OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); in a6xx_set_pagetable() 126 OUT_PKT7(ring, CP_SMMU_TABLE_UPDATE, 4); in a6xx_set_pagetable() 138 OUT_PKT7(ring, CP_MEM_WRITE, 4); in a6xx_set_pagetable() 149 OUT_PKT7(ring, CP_EVENT_WRITE, 1); in a6xx_set_pagetable() 157 OUT_PKT7(ring, CP_WAIT_REG_MEM, 6); in a6xx_set_pagetable() 167 OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); in a6xx_set_pagetable() 194 OUT_PKT7(ring, CP_EVENT_WRITE, 1); in a6xx_submit() 197 OUT_PKT7(rin in a6xx_submit() [all...] |
H A D | adreno_gpu.h | 515 OUT_PKT7(struct msm_ringbuffer *ring, uint8_t opcode, uint16_t cnt) in OUT_PKT7() function
|