| /kernel/uniproton/src/arch/cpu/armv7-m/common/hwi/ |
| H A D | prt_hwi_internal.h | 81 #define OS_NVIC_SETPEND_BASE 0xE000E200UL macro
119 *(volatile U32 *)((uintptr_t)OS_NVIC_SETPEND_BASE + (((hwiNum) >> 5) << 2)) = 1UL << ((hwiNum) & 0x1FUL); \
|
| /kernel/liteos_m/arch/arm/cortex-m3/keil/ |
| H A D | los_arch_interrupt.h | 206 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| H A D | los_interrupt.c | 188 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
in OsExcNvicDump()
|
| /kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/ |
| H A D | los_arch_interrupt.h | 204 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| H A D | los_interrupt.c | 190 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
in OsExcNvicDump()
|
| /kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/ |
| H A D | los_arch_interrupt.h | 204 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| H A D | los_interrupt.c | 190 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
in OsExcNvicDump()
|
| /kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/ |
| H A D | los_arch_interrupt.h | 204 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| H A D | los_interrupt.c | 190 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
in OsExcNvicDump()
|
| /kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/ |
| H A D | los_arch_interrupt.h | 204 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| H A D | los_interrupt.c | 190 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
in OsExcNvicDump()
|
| /kernel/liteos_m/arch/arm/cortex-m4/gcc/ |
| H A D | los_arch_interrupt.h | 204 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| H A D | los_interrupt.c | 189 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
in OsExcNvicDump()
|
| /kernel/liteos_m/arch/arm/cortex-m4/iar/ |
| H A D | los_arch_interrupt.h | 204 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| H A D | los_interrupt.c | 189 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
in OsExcNvicDump()
|
| /kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/ |
| H A D | los_arch_interrupt.h | 197 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| H A D | los_interrupt.c | 193 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
in OsExcNvicDump()
|
| /kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/ |
| H A D | los_arch_interrupt.h | 204 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| H A D | los_interrupt.c | 190 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
in OsExcNvicDump()
|
| /kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/ |
| H A D | los_arch_interrupt.h | 204 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| H A D | los_interrupt.c | 190 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
in OsExcNvicDump()
|
| /kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/ |
| H A D | los_arch_interrupt.h | 204 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| /kernel/liteos_m/arch/arm/cortex-m7/gcc/ |
| H A D | los_arch_interrupt.h | 204 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| /kernel/liteos_m/arch/arm/cortex-m7/iar/ |
| H A D | los_arch_interrupt.h | 204 #define OS_NVIC_SETPEND_BASE 0xE000E200
macro
|
| /kernel/liteos_m/components/exchook/ |
| H A D | los_exc_info.c | 78 (const VOID *)OS_NVIC_SETPEND_BASE, OS_NVIC_INT_PEND_SIZE);
in OsExcSaveIntStatus()
|