| /kernel/uniproton/src/arch/cpu/armv7-m/common/hwi/ |
| H A D | prt_hwi_internal.h | 63 #define OS_NVIC_PRI_BASE 0xE000E400UL macro
101 *(volatile U8 *)((uintptr_t)OS_NVIC_PRI_BASE + (hwiNum)) = (U8)(pri); \
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| H A D | prt_hwi.c | 131 return (U32)OS_HWI_GET_USER_PRIO((*((volatile U8 *)((uintptr_t)OS_NVIC_PRI_BASE + (hwiNum))))); in OsHwiPriorityGet()
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| /kernel/liteos_m/arch/arm/cortex-m3/keil/ |
| H A D | los_arch_interrupt.h | 194 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| H A D | los_interrupt.c | 189 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/ |
| H A D | los_arch_interrupt.h | 192 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| H A D | los_interrupt.c | 191 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/ |
| H A D | los_arch_interrupt.h | 192 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| H A D | los_interrupt.c | 191 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/ |
| H A D | los_arch_interrupt.h | 192 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| H A D | los_interrupt.c | 191 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/ |
| H A D | los_arch_interrupt.h | 192 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| H A D | los_interrupt.c | 191 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m4/gcc/ |
| H A D | los_arch_interrupt.h | 192 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| H A D | los_interrupt.c | 190 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m4/iar/ |
| H A D | los_arch_interrupt.h | 192 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| H A D | los_interrupt.c | 190 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/ |
| H A D | los_arch_interrupt.h | 185 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| H A D | los_interrupt.c | 194 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/ |
| H A D | los_arch_interrupt.h | 192 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| H A D | los_interrupt.c | 191 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/ |
| H A D | los_arch_interrupt.h | 192 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| /kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/ |
| H A D | los_arch_interrupt.h | 192 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| /kernel/liteos_m/arch/arm/cortex-m7/gcc/ |
| H A D | los_arch_interrupt.h | 192 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| /kernel/liteos_m/arch/arm/cortex-m7/iar/ |
| H A D | los_arch_interrupt.h | 192 #define OS_NVIC_PRI_BASE 0xE000E400
macro
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| /kernel/liteos_m/components/exchook/ |
| H A D | los_exc_info.c | 94 (const VOID *)OS_NVIC_PRI_BASE, OS_NVIC_INT_PRI_SIZE);
in OsExcSaveIntStatus()
|