| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | navi12_reg_init.c | 44 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in navi12_reg_base_init()
|
| H A D | navi14_reg_init.c | 44 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in navi14_reg_base_init()
|
| H A D | navi10_reg_init.c | 44 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in navi10_reg_base_init()
|
| H A D | sienna_cichlid_reg_init.c | 45 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in sienna_cichlid_reg_base_init()
|
| H A D | arct_reg_init.c | 43 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in arct_reg_base_init()
|
| H A D | vega20_reg_init.c | 45 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in vega20_reg_base_init()
|
| H A D | vega10_reg_init.c | 46 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in vega10_reg_base_init()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | aldebaran_reg_init.c | 42 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in aldebaran_reg_base_init()
|
| H A D | dimgrey_cavefish_reg_init.c | 45 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
|
| H A D | arct_reg_init.c | 43 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in arct_reg_base_init()
|
| H A D | vega20_reg_init.c | 45 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in vega20_reg_base_init()
|
| H A D | vega10_reg_init.c | 46 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in vega10_reg_base_init()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/ |
| H A D | cyan_skillfish_ip_offset.h | 105 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0, 0, 0, 0 } }, variable
|
| H A D | navi12_ip_offset.h | 137 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } }, variable
|
| H A D | navi14_ip_offset.h | 137 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } }, variable
|
| H A D | vega20_ip_offset.h | 105 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0, 0, 0, 0, 0 } }, variable
|
| H A D | navi10_ip_offset.h | 103 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0, 0, 0, 0, 0 } }, variable
|
| H A D | dimgrey_cavefish_ip_offset.h | 130 static const struct IP_BASE OSSSYS_BASE = { { { { 0x000010A0, 0x0240A000, 0, 0, 0, 0 } }, variable
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/ |
| H A D | navi12_ip_offset.h | 137 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } }, variable
|
| H A D | navi14_ip_offset.h | 137 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } }, variable
|
| H A D | navi10_ip_offset.h | 103 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0, 0, 0, 0, 0 } }, variable
|
| H A D | vega20_ip_offset.h | 105 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0, 0, 0, 0, 0 } }, variable
|
| H A D | renoir_ip_offset.h | 177 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } }, variable
|
| H A D | sienna_cichlid_ip_offset.h | 137 static const struct IP_BASE OSSSYS_BASE = { { { { 0x000010A0, 0x0240A000, 0, 0, 0 } }, variable
|
| H A D | vega10_ip_offset.h | 163 static const struct IP_BASE OSSSYS_BASE = { { { { 0x000010A0, 0, 0, 0, 0 } }, variable
|