Searched refs:MV_WRITE (Results 1 - 2 of 2) sorted by relevance
/kernel/linux/linux-5.10/arch/powerpc/platforms/chrp/ |
H A D | pegasos_eth.c | 112 #define MV_WRITE(offset,data) writel(data, mv643xx_reg_base + offset) macro 132 MV_WRITE(MV64340_SRAM_CONFIG, 0); in Enable_SRAM() 134 MV_WRITE(MV64340_INTEGRATED_SRAM_BASE_ADDR, PEGASOS2_SRAM_BASE >> 16); in Enable_SRAM() 138 MV_WRITE(MV64340_BASE_ADDR_ENABLE, ALong); in Enable_SRAM() 142 MV_WRITE(MV643XX_ETH_BAR_4, ALong); in Enable_SRAM() 144 MV_WRITE(MV643XX_ETH_SIZE_REG_4, (PEGASOS2_SRAM_SIZE-1) & 0xffff0000); in Enable_SRAM() 148 MV_WRITE(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong); in Enable_SRAM()
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/kernel/linux/linux-6.6/arch/powerpc/platforms/chrp/ |
H A D | pegasos_eth.c | 112 #define MV_WRITE(offset,data) writel(data, mv643xx_reg_base + offset) macro 132 MV_WRITE(MV64340_SRAM_CONFIG, 0); in Enable_SRAM() 134 MV_WRITE(MV64340_INTEGRATED_SRAM_BASE_ADDR, PEGASOS2_SRAM_BASE >> 16); in Enable_SRAM() 138 MV_WRITE(MV64340_BASE_ADDR_ENABLE, ALong); in Enable_SRAM() 142 MV_WRITE(MV643XX_ETH_BAR_4, ALong); in Enable_SRAM() 144 MV_WRITE(MV643XX_ETH_SIZE_REG_4, (PEGASOS2_SRAM_SIZE-1) & 0xffff0000); in Enable_SRAM() 148 MV_WRITE(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong); in Enable_SRAM()
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