Searched refs:MVPP22_XLG_CTRL0_REG (Results 1 - 4 of 4) sorted by relevance
| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/mvpp2/ |
| H A D | mvpp2_main.c | 1465 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_enable()
1468 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_enable()
1483 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_disable()
1485 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_disable()
1846 val = readl(port->base + MVPP22_XLG_CTRL0_REG) & in mvpp2_mac_reset_assert()
1848 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_mac_reset_assert()
5566 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_init()
5569 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_init()
5788 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_xlg_pcs_get_state()
6009 mvpp2_modify(port->base + MVPP22_XLG_CTRL0_REG, in mvpp2_xlg_config()
[all...] |
| H A D | mvpp2.h | 475 #define MVPP22_XLG_CTRL0_REG 0x100 macro
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| /kernel/linux/linux-6.6/drivers/net/ethernet/marvell/mvpp2/ |
| H A D | mvpp2_main.c | 1794 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_enable()
1797 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_enable()
1812 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_disable()
1814 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_disable()
2175 val = readl(port->base + MVPP22_XLG_CTRL0_REG) & in mvpp2_mac_reset_assert()
2177 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_mac_reset_assert()
5951 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_init()
5954 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_init()
6194 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_xlg_pcs_get_state()
6344 mvpp2_modify(port->base + MVPP22_XLG_CTRL0_REG, in mvpp2_xlg_config()
[all...] |
| H A D | mvpp2.h | 488 #define MVPP22_XLG_CTRL0_REG 0x100 macro
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