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Searched refs:MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE_BIT (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/arch/x86/include/asm/
H A Dmsr-index.h801 #define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE_BIT 6 macro
802 #define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE_BIT)
/kernel/linux/linux-5.10/tools/arch/x86/include/asm/
H A Dmsr-index.h767 #define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE_BIT 6 macro
768 #define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE_BIT)
/kernel/linux/linux-6.6/arch/x86/include/asm/
H A Dmsr-index.h912 #define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE_BIT 6 macro
913 #define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE_BIT)
/kernel/linux/linux-6.6/tools/arch/x86/include/asm/
H A Dmsr-index.h898 #define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE_BIT 6 macro
899 #define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE_BIT)

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