Home
last modified time | relevance | path

Searched refs:MLXSW_CORE_RES_VALID (Results 1 - 25 of 35) sorted by relevance

12

/kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_policer.c88 if (!MLXSW_CORE_RES_VALID(core, MAX_GLOBAL_POLICERS) || in mlxsw_sp_policer_single_rate_family_init()
89 !MLXSW_CORE_RES_VALID(core, MAX_CPU_POLICERS)) in mlxsw_sp_policer_single_rate_family_init()
411 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_GLOBAL_POLICERS) || in mlxsw_sp_policer_resources_register()
412 !MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS)) in mlxsw_sp_policer_resources_register()
H A Dspectrum_cnt.c255 if (!MLXSW_CORE_RES_VALID(mlxsw_core, COUNTER_POOL_SIZE) || in mlxsw_sp_counter_resources_register()
256 !MLXSW_CORE_RES_VALID(mlxsw_core, COUNTER_BANK_SIZE)) in mlxsw_sp_counter_resources_register()
H A Dspectrum_acl_erp.c1486 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_2KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1487 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_4KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1488 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_8KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1489 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_12KB)) in mlxsw_sp_acl_erp_tables_sizes_query()
1513 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_ERPT_BANK_SIZE) || in mlxsw_sp_acl_erp_tables_init()
1514 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_ERPT_BANKS)) in mlxsw_sp_acl_erp_tables_init()
H A Dspectrum.c2249 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS)) in mlxsw_sp_cpu_policers_set()
2289 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS)) in mlxsw_sp_trap_groups_set()
2371 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_CPU_POLICERS)) in mlxsw_sp_traps_init()
2443 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) || in mlxsw_sp_lag_init()
2444 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS)) in mlxsw_sp_lag_init()
2945 if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE)) in mlxsw_sp1_resources_kvd_register()
3005 if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE)) in mlxsw_sp2_resources_kvd_register()
3025 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SPAN)) in mlxsw_sp_resources_span_register()
3103 if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SINGLE_MIN_SIZE) || in mlxsw_sp_kvd_sizes_get()
3104 !MLXSW_CORE_RES_VALID(mlxsw_cor in mlxsw_sp_kvd_sizes_get()
[all...]
H A Dspectrum1_mr_tcam.c301 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_TCAM_RULES)) in mlxsw_sp1_mr_tcam_init()
H A Dspectrum_acl_bloom_filter.c247 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_BF_LOG)) in mlxsw_sp_acl_bf_init()
H A Dspectrum_nve.c958 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_NVE_MC_ENTRIES_IPV4) || in mlxsw_sp_nve_resources_query()
959 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_NVE_MC_ENTRIES_IPV6)) in mlxsw_sp_nve_resources_query()
H A Dpci.c1487 if (MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V2) && in mlxsw_pci_init()
1490 else if (MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V1) && in mlxsw_pci_init()
1493 else if ((MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V0) && in mlxsw_pci_init()
1495 !MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V0)) { in mlxsw_pci_init()
H A Dcore.h394 #define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id) \ macro
H A Dspectrum_mr_tcam.c575 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MC_ERIF_LIST_ENTRIES)) in mlxsw_sp_mr_tcam_init()
H A Dspectrum_buffers.c1228 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, CELL_SIZE)) in mlxsw_sp_buffers_init()
1231 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, GUARANTEED_SHARED_BUFFER)) in mlxsw_sp_buffers_init()
1234 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_HEADROOM_SIZE)) in mlxsw_sp_buffers_init()
H A Dspectrum_acl_atcam.c125 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_LARGE_KEY_ID)) in mlxsw_sp_acl_atcam_region_12kb_init()
/kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_policer.c88 if (!MLXSW_CORE_RES_VALID(core, MAX_GLOBAL_POLICERS) || in mlxsw_sp_policer_single_rate_family_init()
89 !MLXSW_CORE_RES_VALID(core, MAX_CPU_POLICERS)) in mlxsw_sp_policer_single_rate_family_init()
411 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_GLOBAL_POLICERS) || in mlxsw_sp_policer_resources_register()
412 !MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS)) in mlxsw_sp_policer_resources_register()
H A Dspectrum_cnt.c255 if (!MLXSW_CORE_RES_VALID(mlxsw_core, COUNTER_POOL_SIZE) || in mlxsw_sp_counter_resources_register()
256 !MLXSW_CORE_RES_VALID(mlxsw_core, COUNTER_BANK_SIZE)) in mlxsw_sp_counter_resources_register()
H A Dspectrum_acl_erp.c1499 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_2KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1500 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_4KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1501 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_8KB) || in mlxsw_sp_acl_erp_tables_sizes_query()
1502 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_ERPT_ENTRIES_12KB)) in mlxsw_sp_acl_erp_tables_sizes_query()
1526 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_ERPT_BANK_SIZE) || in mlxsw_sp_acl_erp_tables_init()
1527 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_ERPT_BANKS)) in mlxsw_sp_acl_erp_tables_init()
H A Dspectrum_port_range.c166 if (!MLXSW_CORE_RES_VALID(core, ACL_MAX_L4_PORT_RANGE)) in mlxsw_sp_port_range_init()
H A Dspectrum2_acl_tcam.c85 if (MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_DEFAULT_ACTIONS)) in mlxsw_sp2_acl_tcam_init()
H A Dspectrum.c265 if (!MLXSW_CORE_RES_VALID(mlxsw_core, FID)) { in mlxsw_sp_txhdr_ptp_data_construct()
2560 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS)) in mlxsw_sp_cpu_policers_set()
2600 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS)) in mlxsw_sp_trap_groups_set()
2643 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_CPU_POLICERS)) in mlxsw_sp_traps_init()
2723 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS)) in mlxsw_sp_lag_init()
3606 if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE)) in mlxsw_sp1_resources_kvd_register()
3666 if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE)) in mlxsw_sp2_resources_kvd_register()
3686 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SPAN)) in mlxsw_sp_resources_span_register()
3706 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_RIF_MAC_PROFILES)) in mlxsw_sp_resources_rif_mac_profile_register()
3729 if (!MLXSW_CORE_RES_VALID(mlxsw_cor in mlxsw_sp_resources_rifs_register()
[all...]
H A Dspectrum1_mr_tcam.c301 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, ACL_MAX_TCAM_RULES)) in mlxsw_sp1_mr_tcam_init()
H A Dspectrum_pgt.c325 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, PGT_SIZE)) in mlxsw_sp_pgt_init()
H A Dspectrum_nve.c1106 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_NVE_MC_ENTRIES_IPV4) || in mlxsw_sp_nve_resources_query()
1107 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_NVE_MC_ENTRIES_IPV6)) in mlxsw_sp_nve_resources_query()
H A Dpci.c1602 if (MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V2) && in mlxsw_pci_init()
1605 else if (MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V1) && in mlxsw_pci_init()
1608 else if ((MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V0) && in mlxsw_pci_init()
1610 !MLXSW_CORE_RES_VALID(mlxsw_core, CQE_V0)) { in mlxsw_pci_init()
H A Dspectrum_mr_tcam.c575 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MC_ERIF_LIST_ENTRIES)) in mlxsw_sp_mr_tcam_init()
H A Dspectrum_buffers.c1254 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, CELL_SIZE)) in mlxsw_sp_buffers_init()
1257 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, GUARANTEED_SHARED_BUFFER)) in mlxsw_sp_buffers_init()
1260 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_HEADROOM_SIZE)) in mlxsw_sp_buffers_init()
H A Dcore.h452 #define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id) \ macro

Completed in 40 milliseconds

12