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Searched refs:MI_FLUSH_DW (Results 1 - 14 of 14) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
H A Dgen6_engine_cs.c185 cmd = MI_FLUSH_DW; in mi_flush_dw()
379 *cs++ = MI_FLUSH_DW | MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_DW_STORE_INDEX; in gen6_emit_breadcrumb_xcs()
399 *cs++ = MI_FLUSH_DW | MI_INVALIDATE_TLB | in gen7_emit_breadcrumb_xcs()
410 *cs++ = MI_FLUSH_DW; in gen7_emit_breadcrumb_xcs()
H A Dintel_gpu_commands.h147 #define MI_FLUSH_DW MI_INSTR(0x26, 1) /* for GEN6 */ macro
H A Dintel_engine.h97 /* seqno size is actually only a uint32, but since we plan to use MI_FLUSH_DW to
289 *cs++ = (MI_FLUSH_DW + 1) | flags; in __gen8_emit_flush_dw()
300 /* w/a: bit 5 needs to be zero for MI_FLUSH_DW address. */ in gen8_emit_ggtt_write()
H A Dintel_lrc.c4541 cmd = MI_FLUSH_DW + 1; in gen8_emit_flush()
4816 cmd = MI_FLUSH_DW + 1; in gen12_emit_flush()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/
H A Dgen6_engine_cs.c186 cmd = MI_FLUSH_DW; in mi_flush_dw()
380 *cs++ = MI_FLUSH_DW | MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_DW_STORE_INDEX; in gen6_emit_breadcrumb_xcs()
400 *cs++ = MI_FLUSH_DW | MI_INVALIDATE_TLB | in gen7_emit_breadcrumb_xcs()
411 *cs++ = MI_FLUSH_DW; in gen7_emit_breadcrumb_xcs()
H A Dgen8_engine_cs.h120 *cs++ = (MI_FLUSH_DW + 1) | flags; in __gen8_emit_flush_dw()
131 /* w/a: bit 5 needs to be zero for MI_FLUSH_DW address. */ in gen8_emit_ggtt_write()
H A Dgen8_engine_cs.c87 cmd = MI_FLUSH_DW + 1; in gen8_emit_flush_xcs()
383 cmd = MI_FLUSH_DW + 1; in gen12_emit_flush_xcs()
H A Dintel_gpu_commands.h164 #define MI_FLUSH_DW MI_INSTR(0x26, 1) /* for GEN6 */ macro
H A Dintel_migrate.c523 *cmd++ = MI_FLUSH_DW | flags; in i915_flush_dw()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_cmd.c28 *cs++ = MI_FLUSH_DW; in pxp_emit_session_selection()
38 *cs++ = MI_FLUSH_DW | MI_FLUSH_DW_PROTECTED_MEM_EN | in pxp_emit_session_selection()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A Di915_cmd_parser.c66 * few specific commands on each engine (e.g. PIPE_CONTROL and MI_FLUSH_DW).
337 CMD( MI_FLUSH_DW, SMI, !F, 0x3F, B,
381 CMD( MI_FLUSH_DW, SMI, !F, 0x3F, B,
418 CMD( MI_FLUSH_DW, SMI, !F, 0x3F, B,
481 CMD( MI_FLUSH_DW, SMI, !F, 0x3F, S ),
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
H A Di915_cmd_parser.c75 * few specific commands on each engine (e.g. PIPE_CONTROL and MI_FLUSH_DW).
346 CMD( MI_FLUSH_DW, SMI, !F, 0x3F, B,
390 CMD( MI_FLUSH_DW, SMI, !F, 0x3F, B,
427 CMD( MI_FLUSH_DW, SMI, !F, 0x3F, B,
490 CMD( MI_FLUSH_DW, SMI, !F, 0x3F, S ),
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_client_blt.c175 cmd = MI_FLUSH_DW; in prepare_blit()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_client_blt.c213 cmd = MI_FLUSH_DW; in prepare_blit()

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