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Searched refs:MIPS_CPU_VEIC (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/arch/mips/include/asm/
H A Dcpu.h386 #define MIPS_CPU_VEIC BIT_ULL(20) /* CPU supports MIPSR2 external interrupt controller mode */ macro
H A Dcpu-features.h500 # define cpu_has_veic __opt(MIPS_CPU_VEIC)
/kernel/linux/linux-6.6/arch/mips/include/asm/
H A Dcpu.h379 #define MIPS_CPU_VEIC BIT_ULL(20) /* CPU supports MIPSR2 external interrupt controller mode */ macro
H A Dcpu-features.h498 # define cpu_has_veic __opt(MIPS_CPU_VEIC)
/kernel/linux/linux-5.10/arch/mips/kernel/
H A Dcpu-probe.c524 c->options |= MIPS_CPU_VEIC; in decode_config3()
/kernel/linux/linux-6.6/arch/mips/kernel/
H A Dcpu-probe.c525 c->options |= MIPS_CPU_VEIC; in decode_config3()

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