Home
last modified time | relevance | path

Searched refs:MG_PLL_DIV1 (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_mg_phy_regs.h216 #define MG_PLL_DIV1(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV1_PORT1, \ macro
H A Dintel_dpll_mgr.c3435 hw_state->mg_pll_div1 = intel_de_read(dev_priv, MG_PLL_DIV1(tc_port)); in mg_pll_get_hw_state()
3678 intel_de_write(dev_priv, MG_PLL_DIV1(tc_port), hw_state->mg_pll_div1); in icl_mg_pll_write()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.c3712 hw_state->mg_pll_div1 = intel_de_read(dev_priv, MG_PLL_DIV1(tc_port)); in mg_pll_get_hw_state()
3938 intel_de_write(dev_priv, MG_PLL_DIV1(tc_port), hw_state->mg_pll_div1); in icl_mg_pll_write()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A Di915_reg.h10392 #define MG_PLL_DIV1(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV1_PORT1, \ macro

Completed in 48 milliseconds