Searched refs:MG_PLL_DIV0 (Results 1 - 4 of 4) sorted by relevance
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
H A D | intel_mg_phy_regs.h | 203 #define MG_PLL_DIV0(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV0_PORT1, \ macro
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H A D | intel_dpll_mgr.c | 3434 hw_state->mg_pll_div0 = intel_de_read(dev_priv, MG_PLL_DIV0(tc_port)); in mg_pll_get_hw_state() 3677 intel_de_write(dev_priv, MG_PLL_DIV0(tc_port), hw_state->mg_pll_div0); in icl_mg_pll_write()
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
H A D | intel_dpll_mgr.c | 3711 hw_state->mg_pll_div0 = intel_de_read(dev_priv, MG_PLL_DIV0(tc_port)); in mg_pll_get_hw_state() 3937 intel_de_write(dev_priv, MG_PLL_DIV0(tc_port), hw_state->mg_pll_div0); in icl_mg_pll_write()
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
H A D | i915_reg.h | 10377 #define MG_PLL_DIV0(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV0_PORT1, \ macro
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