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Searched refs:MC417_OEN (Results 1 - 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/media/pci/cx23885/
H A Dcx23885-417.c209 /**** Bit definitions for MC417_RWD and MC417_OEN registers ***
285 /* Configure MC417_OEN to defaults. */ in cx23885_mc417_init()
287 cx_write(MC417_OEN, regval); in cx23885_mc417_init()
316 cx_write(MC417_OEN, MC417_MIRDY); in mc417_register_write()
383 cx_write(MC417_OEN, MC417_MIRDY); in mc417_register_read()
410 cx_write(MC417_OEN, MC417_MIRDY | MC417_MIDATA); in mc417_register_read()
474 cx_write(MC417_OEN, MC417_MIRDY); in mc417_memory_write()
541 cx_write(MC417_OEN, MC417_MIRDY); in mc417_memory_read()
568 cx_write(MC417_OEN, MC417_MIRDY | MC417_MIDATA); in mc417_memory_read()
H A Dcimax2.c19 /**** Bit definitions for MC417_RWD and MC417_OEN registers ***
200 cx_write(MC417_OEN, NETUP_EN_ALL); in netup_ci_op_cam()
209 cx_write(MC417_OEN, NETUP_EN_ALL | NETUP_DATA); in netup_ci_op_cam()
H A Dcx23885-reg.h354 #define MC417_OEN 0x00110024 macro
H A Dcx23885-cards.c1662 cx_write(MC417_OEN, 0x00001000); in cx23885_gpio_setup()
1690 cx_write(MC417_OEN, 0x00001000); in cx23885_gpio_setup()
1788 cx_write(MC417_OEN, 0x00005000); in cx23885_gpio_setup()
1869 cx_write(MC417_OEN, 0x00001000); in cx23885_gpio_setup()
H A Dcx23885-dvb.c687 cx_write(MC417_OEN, SP2_EN_ALL); in cx23885_sp2_ci_ctrl()
697 cx_write(MC417_OEN, SP2_EN_ALL | SP2_DATA); in cx23885_sp2_ci_ctrl()
942 cx_set(MC417_OEN, ALT_DATA); in netup_altera_fpga_rw()
944 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */ in netup_altera_fpga_rw()
H A Dcx23885-core.c2059 /* MC417_OEN is active low for output, write 1 for an input */ in cx23885_gpio_enable()
2061 cx_clear(MC417_OEN, (mask & 0x7fff8) >> 3); in cx23885_gpio_enable()
2064 cx_set(MC417_OEN, (mask & 0x7fff8) >> 3); in cx23885_gpio_enable()
/kernel/linux/linux-6.6/drivers/media/pci/cx23885/
H A Dcx23885-417.c209 /**** Bit definitions for MC417_RWD and MC417_OEN registers ***
285 /* Configure MC417_OEN to defaults. */ in cx23885_mc417_init()
287 cx_write(MC417_OEN, regval); in cx23885_mc417_init()
316 cx_write(MC417_OEN, MC417_MIRDY); in mc417_register_write()
383 cx_write(MC417_OEN, MC417_MIRDY); in mc417_register_read()
410 cx_write(MC417_OEN, MC417_MIRDY | MC417_MIDATA); in mc417_register_read()
474 cx_write(MC417_OEN, MC417_MIRDY); in mc417_memory_write()
541 cx_write(MC417_OEN, MC417_MIRDY); in mc417_memory_read()
568 cx_write(MC417_OEN, MC417_MIRDY | MC417_MIDATA); in mc417_memory_read()
H A Dcimax2.c19 /**** Bit definitions for MC417_RWD and MC417_OEN registers ***
200 cx_write(MC417_OEN, NETUP_EN_ALL); in netup_ci_op_cam()
209 cx_write(MC417_OEN, NETUP_EN_ALL | NETUP_DATA); in netup_ci_op_cam()
H A Dcx23885-reg.h354 #define MC417_OEN 0x00110024 macro
H A Dcx23885-cards.c1662 cx_write(MC417_OEN, 0x00001000); in cx23885_gpio_setup()
1690 cx_write(MC417_OEN, 0x00001000); in cx23885_gpio_setup()
1788 cx_write(MC417_OEN, 0x00005000); in cx23885_gpio_setup()
1869 cx_write(MC417_OEN, 0x00001000); in cx23885_gpio_setup()
H A Dcx23885-dvb.c687 cx_write(MC417_OEN, SP2_EN_ALL); in cx23885_sp2_ci_ctrl()
697 cx_write(MC417_OEN, SP2_EN_ALL | SP2_DATA); in cx23885_sp2_ci_ctrl()
942 cx_set(MC417_OEN, ALT_DATA); in netup_altera_fpga_rw()
944 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */ in netup_altera_fpga_rw()
H A Dcx23885-core.c2063 /* MC417_OEN is active low for output, write 1 for an input */ in cx23885_gpio_enable()
2065 cx_clear(MC417_OEN, (mask & 0x7fff8) >> 3); in cx23885_gpio_enable()
2068 cx_set(MC417_OEN, (mask & 0x7fff8) >> 3); in cx23885_gpio_enable()

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