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Help
Searched
refs:MAX_PLL_DIV
(Results
1 - 4
of
4
) sorted by relevance
/kernel/linux/linux-5.10/drivers/clk/
H
A
D
clk-stm32f4.c
573
#define
MAX_PLL_DIV
3
macro
574
static const struct stm32f4_div_data div_data[
MAX_PLL_DIV
] = {
583
const char *div_name[
MAX_PLL_DIV
];
586
static const struct stm32f4_pll_data stm32f429_pll[
MAX_PLL_DIV
] = {
592
static const struct stm32f4_pll_data stm32f469_pll[
MAX_PLL_DIV
] = {
828
for (i = 0; i <
MAX_PLL_DIV
; i++)
in stm32f4_rcc_register_pll()
H
A
D
clk-qoriq.c
34
#define
MAX_PLL_DIV
32
macro
42
struct clockgen_pll_div div[
MAX_PLL_DIV
];
1251
* For platform PLL, there are
MAX_PLL_DIV
divider clocks.
in create_one_pll()
/kernel/linux/linux-6.6/drivers/clk/
H
A
D
clk-stm32f4.c
573
#define
MAX_PLL_DIV
3
macro
574
static const struct stm32f4_div_data div_data[
MAX_PLL_DIV
] = {
583
const char *div_name[
MAX_PLL_DIV
];
586
static const struct stm32f4_pll_data stm32f429_pll[
MAX_PLL_DIV
] = {
592
static const struct stm32f4_pll_data stm32f469_pll[
MAX_PLL_DIV
] = {
828
for (i = 0; i <
MAX_PLL_DIV
; i++)
in stm32f4_rcc_register_pll()
H
A
D
clk-qoriq.c
36
#define
MAX_PLL_DIV
32
macro
44
struct clockgen_pll_div div[
MAX_PLL_DIV
];
1277
* For platform PLL, there are
MAX_PLL_DIV
divider clocks.
in create_one_pll()
Completed in 9 milliseconds