| /kernel/liteos_m/arch/arm/arm9/gcc/ |
| H A D | los_dispatch.S | 71 STMFD R0!, {LR}
72 MOV LR, R0
75 STMFD LR, {R0-R14}^
77 SUB LR, LR, #60
79 STMFD LR!, {R0}
83 STR LR, [R1]
88 STMFD SP!, {R0-R12, LR}
103 LDR LR, [R1]
105 LDMFD LR!, {R
[all...] |
| H A D | los_exc.S | 70 SUB LR, LR, #4
78 SUB LR, LR, #4
86 SUB LR, LR, #8
95 MOV R2, LR
104 STMFD SP!, {LR}
116 MOV LR, PC
126 LDMFD SP!, {LR}
[all...] |
| /kernel/linux/linux-5.10/drivers/video/fbdev/matrox/ |
| H A D | matroxfb_maven.c | 523 #define LR(x) maven_set_reg(c, (x), m->regs[(x)]) macro
548 LR(0x00); LR(0x01); LR(0x02); LR(0x03); in maven_init_TV()
550 LR(0x04); in maven_init_TV()
552 LR(0x2C); in maven_init_TV()
553 LR(0x08); in maven_init_TV()
554 LR(0x0A); in maven_init_TV()
555 LR( in maven_init_TV()
[all...] |
| /kernel/linux/linux-6.6/drivers/video/fbdev/matrox/ |
| H A D | matroxfb_maven.c | 523 #define LR(x) maven_set_reg(c, (x), m->regs[(x)]) macro
548 LR(0x00); LR(0x01); LR(0x02); LR(0x03); in maven_init_TV()
550 LR(0x04); in maven_init_TV()
552 LR(0x2C); in maven_init_TV()
553 LR(0x08); in maven_init_TV()
554 LR(0x0A); in maven_init_TV()
555 LR( in maven_init_TV()
[all...] |
| /kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/ |
| H A D | los_dispatch.S | 66 PUSH {R12, LR}
68 POP {R12, LR}
106 BX LR
111 BX LR
115 BX LR
123 BX LR
132 PUSH {R12, LR}
134 POP {R12, LR}
136 MOV R0, LR
139 BX LR
[all...] |
| /kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/ |
| H A D | los_dispatch.S | 66 PUSH {R12, LR}
68 POP {R12, LR}
106 BX LR
111 BX LR
115 BX LR
123 BX LR
132 PUSH {R12, LR}
134 POP {R12, LR}
136 MOV R0, LR
139 BX LR
[all...] |
| /kernel/uniproton/src/arch/cpu/armv7-m/cortex-m4/ |
| H A D | prt_dispatch.S | 136 @get LR,PC,XPSR from stack
140 MOV LR, R2
157 BX LR
163 BX LR
167 BX LR
171 BX LR
175 BX LR
181 BX LR
184 TST LR, #OS_SP_SELECT_FLAG
223 push {R12,LR}
[all...] |
| H A D | prt_hw_exc.S | 47 OS_NORMAL_PUSH_SP_AUTO = 32 @auto save 8 normal R registers(xPSR, PC, LR, R12,R0~R3),8*4
162 TST LR, #0x4 @exc_return bit2
232 MOV R2, R14 @MSP:LR bit2 is 0; PSP:LR bit2 is 1
238 ADD R3, R13, #OS_NORMAL_PUSH_SP_AUTO @ xPSR, PC, LR, R12,R0~R3 hardware save,8*4 bytes
239 TST LR, #OS_FPU_SAVE_FLAG @ Is the MSP using the floating-point state?
241 ADD R3, R13, #OS_FPU_PUSH_SP_AUTO @ xPSR, PC, LR, R12,R0~R3 and float register hardware save
253 SUB R13, #OS_NORMAL_PUSH_SP_AUTO @ first add 8*4 Bytes Revs (for Reg. STMFD xPSR, PC, LR, R12,R0~R3)
257 ADD R12, R3, #OS_NORMAL_PUSH_SP_AUTO @ xPSR, PC, LR, R12,R0~R3 hardware save,8*4 bytes
258 TST LR, #OS_FPU_SAVE_FLA
[all...] |
| /kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/ |
| H A D | los_dispatch.S | 49 PUSH {R12, LR}
51 POP {R12, LR}
96 BX LR
107 BX LR
117 BX LR
163 PUSH {R0-R1, R12, R14} /* Store registers, include LR, PRIMASK. */
166 MOV LR, R3
184 MOV R3, LR
185 STMIA R0!, {R1, R2-R3} /* Store g_secureContext, PSPLIM and LR on the stack of current task. */
192 LDMIA R1!, {R0, R2-R3} /* Restore secureContext, PSPLIM and LR fro
[all...] |
| /kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/ |
| H A D | los_dispatch.S | 49 PUSH {R12, LR}
51 POP {R12, LR}
96 BX LR
107 BX LR
117 BX LR
163 PUSH {R0-R1, R12, R14} /* Store registers, include LR, PRIMASK. */
166 MOV LR, R3
184 MOV R3, LR
185 STMIA R0!, {R1, R2-R3} /* Store g_secureContext, PSPLIM and LR on the stack of current task. */
192 LDMIA R1!, {R0, R2-R3} /* Restore secureContext, PSPLIM and LR fro
[all...] |
| /kernel/liteos_a/arch/arm/arm/src/ |
| H A D | los_dispatch.S | 90 STMFD SP!, {LR}
91 STMFD SP!, {LR}
134 LDMFD SP!, {R0-R3, R12, LR}
139 LDMFD SP!, {R0-R3, R12, LR}
143 SUB LR, LR, #4
151 PUSH {R0-R3, R12, LR}
152 MOV R0, LR
155 POP {R0-R3, R12, LR}
158 STMFD SP!, {R0-R3, R12, LR}
[all...] |
| H A D | los_hw_exc.S | 104 MOV R3, LR @save pc
114 STR LR, [R0, #4] @LR
159 PUSH {FP, LR}
178 STMFD SP!, {R0-R3, R12, LR}
193 STMFD SP!, {R0-R3, R12, LR}
236 LDMFD SP!, {R0-R3, R12, LR}
255 SUB LR, LR, #4 @ LR offse
[all...] |
| H A D | los_hw_runstop.S | 70 MOV R1, LR
72 STMFD R0!, {R1} @LR
89 BX LR
114 LDMFD R0!, {R1} @LR
117 MOV LR, R1
130 BX LR
|
| /kernel/liteos_m/arch/arm/cortex-m3/keil/ |
| H A D | los_dispatch.S | 73 MOV LR, R5
83 BX LR
88 BX LR
92 BX LR
100 BX LR
107 PUSH {R12, LR}
109 POP {R12, LR}
111 MOV R0, LR
114 BX LR
117 MOV LR, R
[all...] |
| /kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/ |
| H A D | los_dispatch.S | 57 PUSH {R12, LR}
59 POP {R12, LR}
89 MOV LR, R5
98 MOV LR, R5
106 BX LR
111 BX LR
115 BX LR
123 BX LR
130 PUSH {R12, LR}
132 POP {R12, LR}
[all...] |
| /kernel/liteos_m/arch/arm/cortex-m4/iar/ |
| H A D | los_dispatch.S | 57 PUSH {R12, LR}
59 POP {R12, LR}
89 MOV LR, R5
98 MOV LR, R5
106 BX LR
111 BX LR
115 BX LR
123 BX LR
132 PUSH {R12, LR}
134 POP {R12, LR}
[all...] |
| /kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/ |
| H A D | los_dispatch.S | 57 PUSH {R12, LR}
59 POP {R12, LR}
89 MOV LR, R5
98 MOV LR, R5
106 BX LR
111 BX LR
115 BX LR
123 BX LR
130 PUSH {R12, LR}
132 POP {R12, LR}
[all...] |
| /kernel/liteos_m/arch/arm/cortex-m7/iar/ |
| H A D | los_dispatch.S | 57 PUSH {R12, LR}
59 POP {R12, LR}
89 MOV LR, R5
98 MOV LR, R5
106 BX LR
111 BX LR
115 BX LR
123 BX LR
132 PUSH {R12, LR}
134 POP {R12, LR}
[all...] |
| /kernel/liteos_m/components/backtrace/ |
| H A D | los_backtrace.c | 127 /* The stack space pointed to by the current SP may store the LR,
in OsAddrIsValid()
194 VOID LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 jumpCount, UINTPTR SP)
in LOS_RecordLR() argument
202 if (LR == NULL) {
in LOS_RecordLR()
225 LR[count] = backRa;
in LOS_RecordLR()
233 LR[count] = 0;
in LOS_RecordLR()
458 VOID LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 jumpCount, UINTPTR SP)
in LOS_RecordLR() argument
461 if (LR == NULL) {
in LOS_RecordLR()
472 HalBackTraceGet(SP, reglr, LR, LRSize, jumpCount);
in LOS_RecordLR()
530 VOID LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 jumpCount, UINTPTR SP)
in LOS_RecordLR() argument
540 if (LR in LOS_RecordLR()
612 LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 jumpCount, UINTPTR SP) LOS_RecordLR() argument
670 LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 jumpCount, UINTPTR SP) LOS_RecordLR() argument
712 UINTPTR LR[BACKTRACE_MAX_DEPTH] = {0}; LOS_BackTrace() local
[all...] |
| /kernel/linux/linux-5.10/arch/arm/kernel/ |
| H A D | entry-ftrace.S | 70 str lr, [sp, #-8]! @ store LR as PC and make space for CPSR/OLD_R0,
71 @ OLD_R0 will overwrite previous LR
73 ldr lr, [sp, #8] @ get previous LR
75 str r0, [sp, #8] @ write r0 as OLD_R0 over previous LR
77 str lr, [sp, #-4]! @ store previous LR as LR
79 add lr, sp, #16 @ move in LR the value of SP as it was
86 @ R0 | R1 | ... | IP | SP + 4 | previous LR | LR | PSR | OLD_R0 |
96 ldr lr, [sp, #S_PC] @ get LR
[all...] |
| /kernel/linux/linux-6.6/arch/arm/kernel/ |
| H A D | entry-ftrace.S | 67 str lr, [sp, #-8]! @ store LR as PC and make space for CPSR/OLD_R0,
68 @ OLD_R0 will overwrite previous LR
70 ldr lr, [sp, #8] @ get previous LR
72 str r0, [sp, #8] @ write r0 as OLD_R0 over previous LR
74 str lr, [sp, #-4]! @ store previous LR as LR
76 add lr, sp, #16 @ move in LR the value of SP as it was
83 @ R0 | R1 | ... | IP | SP + 4 | previous LR | LR | PSR | OLD_R0 |
92 ldr lr, [sp, #S_PC] @ get LR
[all...] |
| /kernel/liteos_a/arch/arm/include/ |
| H A D | los_exc.h | 60 UINT64 LR; /**< Program returning address. X30 */ member
86 UINT32 LR; /**< Program returning address. */ member
193 * @brief record LR function.
197 * @param LR [IN] Type #UINTPTR * LR buffer.
198 * @param recordCount [IN] Type UINT32 record LR lay number.
199 * @param jumpCount [IN] Type UINT32 ignore LR lay number.
207 VOID LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 recordCount, UINT32 jumpCount);
|
| /kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/secure/ |
| H A D | los_secure_context_asm.S | 67 BX LR
81 BX LR
100 BX LR
|
| /kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/secure/ |
| H A D | los_secure_context_asm.S | 65 BX LR
74 BX LR
87 BX LR
|
| /kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/secure/ |
| H A D | los_secure_context_asm.S | 67 BX LR
81 BX LR
100 BX LR
|