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Searched refs:LANE_PLL_MASK (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c337 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
343 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
349 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
355 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
H A Dpsb_intel_reg.h1368 #define LANE_PLL_MASK (0x7 << 20) macro
/kernel/linux/linux-6.6/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c338 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
344 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
350 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
356 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
H A Dpsb_intel_reg.h1326 #define LANE_PLL_MASK (0x7 << 20) macro

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