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Type of analyzer used to filter file types include with selected(e.g. just C sources).
Help
Searched
refs:KSEG1
(Results
1 - 21
of
21
) sorted by relevance
/kernel/linux/linux-5.10/arch/mips/include/asm/txx9/
H
A
D
jmr3927.h
33
#define JMR3927_PORT_BASE
KSEG1
36
#define JMR3927_ROM0_BASE (
KSEG1
+ JMR3927_ROMCE0)
37
#define JMR3927_ROM1_BASE (
KSEG1
+ JMR3927_ROMCE1)
38
#define JMR3927_IOC_BASE (
KSEG1
+ JMR3927_ROMCE2)
39
#define JMR3927_PCIMEM_BASE (
KSEG1
+ JMR3927_PCIMEM)
40
#define JMR3927_PCIIO_BASE (
KSEG1
+ JMR3927_PCIIO)
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-lantiq/falcon/
H
A
D
lantiq_soc.h
23
* let's use
KSEG1
instead
34
#define FALCON_CHIPID ((u32 *)(
KSEG1
+ LTQ_STATUS_BASE_ADDR + 0x0c))
35
#define FALCON_CHIPTYPE ((u32 *)(
KSEG1
+ LTQ_STATUS_BASE_ADDR + 0x38))
36
#define FALCON_CHIPCONF ((u32 *)(
KSEG1
+ LTQ_STATUS_BASE_ADDR + 0x40))
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-lantiq/falcon/
H
A
D
lantiq_soc.h
23
* let's use
KSEG1
instead
34
#define FALCON_CHIPID ((u32 *)(
KSEG1
+ LTQ_STATUS_BASE_ADDR + 0x0c))
35
#define FALCON_CHIPTYPE ((u32 *)(
KSEG1
+ LTQ_STATUS_BASE_ADDR + 0x38))
36
#define FALCON_CHIPCONF ((u32 *)(
KSEG1
+ LTQ_STATUS_BASE_ADDR + 0x40))
/kernel/linux/linux-5.10/arch/mips/lantiq/falcon/
H
A
D
reset.c
25
#define BOOT_REG_BASE (
KSEG1
| 0x1F200000)
31
#define WDT_REG_BASE (
KSEG1
| 0x1F8803F0)
H
A
D
prom.c
34
#define BOOT_REG_BASE (
KSEG1
| 0x1F200000)
/kernel/linux/linux-6.6/arch/mips/lantiq/falcon/
H
A
D
reset.c
25
#define BOOT_REG_BASE (
KSEG1
| 0x1F200000)
31
#define WDT_REG_BASE (
KSEG1
| 0x1F8803F0)
H
A
D
prom.c
34
#define BOOT_REG_BASE (
KSEG1
| 0x1F200000)
/kernel/linux/linux-5.10/arch/mips/include/asm/
H
A
D
addrspace.h
81
#define CKSEG1ADDR(a) (CPHYSADDR(a) |
KSEG1
)
89
#define KSEG1ADDR(a) (CPHYSADDR(a) |
KSEG1
)
99
#define
KSEG1
0xa0000000
macro
/kernel/linux/linux-6.6/arch/mips/include/asm/
H
A
D
addrspace.h
81
#define CKSEG1ADDR(a) (CPHYSADDR(a) |
KSEG1
)
89
#define KSEG1ADDR(a) (CPHYSADDR(a) |
KSEG1
)
99
#define
KSEG1
0xa0000000
macro
/kernel/linux/linux-5.10/arch/mips/lantiq/
H
A
D
prom.c
72
set_io_port_base((unsigned long)
KSEG1
);
in plat_mem_setup()
/kernel/linux/linux-5.10/arch/mips/rb532/
H
A
D
setup.c
50
set_io_port_base(
KSEG1
);
in plat_mem_setup()
/kernel/linux/linux-6.6/arch/mips/rb532/
H
A
D
setup.c
50
set_io_port_base(
KSEG1
);
in plat_mem_setup()
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-lantiq/xway/
H
A
D
lantiq_soc.h
76
* let's use
KSEG1
instead
94
#define LTQ_MPS_BASE_ADDR (
KSEG1
+ 0x1F107000)
/kernel/linux/linux-5.10/arch/mips/ralink/
H
A
D
of.c
71
set_io_port_base(
KSEG1
);
in plat_mem_setup()
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-lantiq/xway/
H
A
D
lantiq_soc.h
76
* let's use
KSEG1
instead
94
#define LTQ_MPS_BASE_ADDR (
KSEG1
+ 0x1F107000)
/kernel/linux/linux-6.6/arch/mips/lantiq/
H
A
D
prom.c
76
set_io_port_base((unsigned long)
KSEG1
);
in plat_mem_setup()
/kernel/linux/linux-6.6/arch/mips/ralink/
H
A
D
of.c
91
set_io_port_base(
KSEG1
);
in plat_mem_setup()
/kernel/linux/linux-5.10/arch/mips/ath79/
H
A
D
setup.c
218
set_io_port_base(
KSEG1
);
in plat_mem_setup()
/kernel/linux/linux-6.6/arch/mips/ath79/
H
A
D
setup.c
215
set_io_port_base(
KSEG1
);
in plat_mem_setup()
/kernel/linux/linux-5.10/arch/mips/txx9/rbtx4927/
H
A
D
setup.c
224
set_io_port_base(
KSEG1
+ RBTX4927_ISA_IO_OFFSET);
in rbtx4927_mem_setup()
/kernel/linux/linux-6.6/arch/mips/txx9/rbtx4927/
H
A
D
setup.c
224
set_io_port_base(
KSEG1
+ RBTX4927_ISA_IO_OFFSET);
in rbtx4927_mem_setup()
Completed in 6 milliseconds