Searched refs:IS_MASKED_BITS_ENABLED (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/ |
| H A D | mmio_context.h | 59 IS_MASKED_BITS_ENABLED(a, CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT)
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| H A D | reg.h | 97 #define IS_MASKED_BITS_ENABLED(_val, _b) \ macro
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| H A D | handlers.c | 1776 if (IS_MASKED_BITS_ENABLED(data, 1)) { in ring_mode_mmio_write()
1783 IS_MASKED_BITS_ENABLED(data, 2)) { in ring_mode_mmio_write()
1792 if ((IS_MASKED_BITS_ENABLED(data, GFX_PPGTT_ENABLE) || in ring_mode_mmio_write()
1793 IS_MASKED_BITS_ENABLED(data, GFX_RUN_LIST_ENABLE)) && in ring_mode_mmio_write()
1798 if (IS_MASKED_BITS_ENABLED(data, GFX_RUN_LIST_ENABLE) || in ring_mode_mmio_write()
1860 if (IS_MASKED_BITS_ENABLED(data, RESET_CTL_REQUEST_RESET)) in ring_reset_ctl_write()
1878 if (IS_MASKED_BITS_ENABLED(data, 0x10) || in csfe_chicken1_mmio_write()
1879 IS_MASKED_BITS_ENABLED(data, 0x8)) in csfe_chicken1_mmio_write()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/ |
| H A D | mmio_context.h | 71 IS_MASKED_BITS_ENABLED(a, CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT)
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| H A D | reg.h | 96 #define IS_MASKED_BITS_ENABLED(_val, _b) \ macro
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| H A D | handlers.c | 2027 if (IS_MASKED_BITS_ENABLED(data, 1)) { in ring_mode_mmio_write()
2034 IS_MASKED_BITS_ENABLED(data, 2)) { in ring_mode_mmio_write()
2043 if ((IS_MASKED_BITS_ENABLED(data, GFX_PPGTT_ENABLE) || in ring_mode_mmio_write()
2044 IS_MASKED_BITS_ENABLED(data, GFX_RUN_LIST_ENABLE)) && in ring_mode_mmio_write()
2049 if (IS_MASKED_BITS_ENABLED(data, GFX_RUN_LIST_ENABLE) || in ring_mode_mmio_write()
2111 if (IS_MASKED_BITS_ENABLED(data, RESET_CTL_REQUEST_RESET)) in ring_reset_ctl_write()
2129 if (IS_MASKED_BITS_ENABLED(data, 0x10) || in csfe_chicken1_mmio_write()
2130 IS_MASKED_BITS_ENABLED(data, 0x8)) in csfe_chicken1_mmio_write()
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