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Searched refs:IP9_31_28 (Results 1 - 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77980.c95 #define GPSR2_24 F_(MSIOF0_SS2, IP9_31_28)
265 #define IP9_31_28 FM(MSIOF0_SS2) FM(DU_DB1) FM(TCLK4) FM(VI0_DATA19) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
335 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28
813 PINMUX_IPSR_GPSR(IP9_31_28, MSIOF0_SS2),
814 PINMUX_IPSR_GPSR(IP9_31_28, DU_DB1),
815 PINMUX_IPSR_GPSR(IP9_31_28, TCLK4),
816 PINMUX_IPSR_GPSR(IP9_31_28, VI0_DATA19),
2853 IP9_31_28
H A Dpfc-r8a7790.c1322 PINMUX_IPSR_GPSR(IP9_31_28, SD1_CD),
1323 PINMUX_IPSR_GPSR(IP9_31_28, MMC1_D6),
1324 PINMUX_IPSR_MSEL(IP9_31_28, TS_SDEN1, SEL_TSIF1_0),
1325 PINMUX_IPSR_GPSR(IP9_31_28, USB1_EXTP),
1326 PINMUX_IPSR_MSEL(IP9_31_28, GLO_SS, SEL_GPS_0),
1327 PINMUX_IPSR_MSEL(IP9_31_28, VI0_CLK_B, SEL_VI0_1),
1328 PINMUX_IPSR_MSEL(IP9_31_28, IIC2_SCL_D, SEL_IIC2_3),
1329 PINMUX_IPSR_MSEL(IP9_31_28, I2C2_SCL_D, SEL_I2C2_3),
1330 PINMUX_IPSR_MSEL(IP9_31_28, SIM0_CLK_B, SEL_SIM_1),
1331 PINMUX_IPSR_MSEL(IP9_31_28, VI3_CLK_
[all...]
H A Dpfc-r8a77995.c114 #define GPSR3_9 F_(NFDATA7, IP9_31_28)
282 #define IP9_31_28 FM(NFDATA7) FM(MMC_D7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
374 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \
824 PINMUX_IPSR_GPSR(IP9_31_28, NFDATA7),
825 PINMUX_IPSR_GPSR(IP9_31_28, MMC_D7),
2712 IP9_31_28
H A Dpfc-r8a77990.c165 #define GPSR4_4 F_(SD3_DAT2, IP9_31_28)
297 #define IP9_31_28 FM(SD3_DAT2) FM(NFDATA2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
411 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \
1036 PINMUX_IPSR_GPSR(IP9_31_28, SD3_DAT2),
1037 PINMUX_IPSR_GPSR(IP9_31_28, NFDATA2),
4859 IP9_31_28
H A Dpfc-r8a77951.c176 #define GPSR4_7 F_(SD3_CLK, IP9_31_28)
337 #define IP9_31_28 FM(SD3_CLK) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
471 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \
1120 PINMUX_IPSR_GPSR(IP9_31_28, SD3_CLK),
1121 PINMUX_IPSR_GPSR(IP9_31_28, NFWE_N),
5480 IP9_31_28
H A Dpfc-r8a77965.c181 #define GPSR4_7 F_(SD3_CLK, IP9_31_28)
342 #define IP9_31_28 FM(SD3_CLK) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
476 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \
1126 PINMUX_IPSR_GPSR(IP9_31_28, SD3_CLK),
1127 PINMUX_IPSR_GPSR(IP9_31_28, NFWE_N),
5686 IP9_31_28
H A Dpfc-r8a7796.c181 #define GPSR4_7 F_(SD3_CLK, IP9_31_28)
342 #define IP9_31_28 FM(SD3_CLK) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
476 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \
1123 PINMUX_IPSR_GPSR(IP9_31_28, SD3_CLK),
1124 PINMUX_IPSR_GPSR(IP9_31_28, NFWE_N),
5433 IP9_31_28
H A Dpfc-r8a77950.c168 #define GPSR4_14 F_(SD3_DAT5, IP9_31_28)
337 #define IP9_31_28 FM(SD3_DAT5) FM(SD2_WP_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
461 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \
1104 PINMUX_IPSR_GPSR(IP9_31_28, SD3_DAT5),
1105 PINMUX_IPSR_MSEL(IP9_31_28, SD2_WP_A, SEL_SDHI2_0),
5119 IP9_31_28
H A Dpfc-r8a77470.c829 PINMUX_IPSR_GPSR(IP9_31_28, VI1_DATA9),
830 PINMUX_IPSR_MSEL(IP9_31_28, SDA2_B, SEL_I2C02_1),
831 PINMUX_IPSR_GPSR(IP9_31_28, AVB_TXD0),
3004 /* IP9_31_28 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77980.c107 #define GPSR2_24 F_(MSIOF0_SS2, IP9_31_28)
277 #define IP9_31_28 FM(MSIOF0_SS2) FM(DU_DB1) FM(TCLK4) FM(VI0_DATA19) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
344 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28
822 PINMUX_IPSR_GPSR(IP9_31_28, MSIOF0_SS2),
823 PINMUX_IPSR_GPSR(IP9_31_28, DU_DB1),
824 PINMUX_IPSR_GPSR(IP9_31_28, TCLK4),
825 PINMUX_IPSR_GPSR(IP9_31_28, VI0_DATA19),
2777 IP9_31_28
H A Dpfc-r8a7790.c1322 PINMUX_IPSR_GPSR(IP9_31_28, SD1_CD),
1323 PINMUX_IPSR_GPSR(IP9_31_28, MMC1_D6),
1324 PINMUX_IPSR_MSEL(IP9_31_28, TS_SDEN1, SEL_TSIF1_0),
1325 PINMUX_IPSR_GPSR(IP9_31_28, USB1_EXTP),
1326 PINMUX_IPSR_MSEL(IP9_31_28, GLO_SS, SEL_GPS_0),
1327 PINMUX_IPSR_MSEL(IP9_31_28, VI0_CLK_B, SEL_VI0_1),
1328 PINMUX_IPSR_MSEL(IP9_31_28, IIC2_SCL_D, SEL_IIC2_3),
1329 PINMUX_IPSR_MSEL(IP9_31_28, I2C2_SCL_D, SEL_I2C2_3),
1330 PINMUX_IPSR_MSEL(IP9_31_28, SIM0_CLK_B, SEL_SIM_1),
1331 PINMUX_IPSR_MSEL(IP9_31_28, VI3_CLK_
[all...]
H A Dpfc-r8a77995.c125 #define GPSR3_9 F_(NFDATA7, IP9_31_28)
293 #define IP9_31_28 FM(NFDATA7) FM(MMC_D7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
385 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \
835 PINMUX_IPSR_GPSR(IP9_31_28, NFDATA7),
836 PINMUX_IPSR_GPSR(IP9_31_28, MMC_D7),
2764 IP9_31_28
H A Dpfc-r8a77990.c165 #define GPSR4_4 F_(SD3_DAT2, IP9_31_28)
297 #define IP9_31_28 FM(SD3_DAT2) FM(NFDATA2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
411 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \
1037 PINMUX_IPSR_GPSR(IP9_31_28, SD3_DAT2),
1038 PINMUX_IPSR_GPSR(IP9_31_28, NFDATA2),
4879 IP9_31_28
H A Dpfc-r8a77951.c175 #define GPSR4_7 F_(SD3_CLK, IP9_31_28)
336 #define IP9_31_28 FM(SD3_CLK) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
470 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \
1119 PINMUX_IPSR_GPSR(IP9_31_28, SD3_CLK),
1120 PINMUX_IPSR_GPSR(IP9_31_28, NFWE_N),
5440 IP9_31_28
H A Dpfc-r8a77965.c180 #define GPSR4_7 F_(SD3_CLK, IP9_31_28)
341 #define IP9_31_28 FM(SD3_CLK) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
475 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \
1125 PINMUX_IPSR_GPSR(IP9_31_28, SD3_CLK),
1126 PINMUX_IPSR_GPSR(IP9_31_28, NFWE_N),
5636 IP9_31_28
H A Dpfc-r8a7796.c180 #define GPSR4_7 F_(SD3_CLK, IP9_31_28)
341 #define IP9_31_28 FM(SD3_CLK) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
475 FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \
1122 PINMUX_IPSR_GPSR(IP9_31_28, SD3_CLK),
1123 PINMUX_IPSR_GPSR(IP9_31_28, NFWE_N),
5395 IP9_31_28
H A Dpfc-r8a77470.c839 PINMUX_IPSR_GPSR(IP9_31_28, VI1_DATA9),
840 PINMUX_IPSR_MSEL(IP9_31_28, SDA2_B, SEL_I2C02_1),
841 PINMUX_IPSR_GPSR(IP9_31_28, AVB_TXD0),
2911 /* IP9_31_28 [4] */

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