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Searched refs:IP8_11_8 (Results 1 - 19 of 19) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c63 #define GPSR1_23 F_(CANFD1_TX, IP8_11_8)
219 #define IP8_11_8 FM(CANFD1_TX) FM(FXR_TXDB) FM(PWM2_B) FM(TCLK1_B) FM(TX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
279 FM(IP8_11_8) IP8_11_8 \
697 PINMUX_IPSR_GPSR(IP8_11_8, CANFD1_TX),
698 PINMUX_IPSR_GPSR(IP8_11_8, FXR_TXDB),
699 PINMUX_IPSR_MSEL(IP8_11_8, PWM2_B, SEL_PWM2_1),
700 PINMUX_IPSR_MSEL(IP8_11_8, TCLK1_B, SEL_TMU_1),
701 PINMUX_IPSR_MSEL(IP8_11_8, TX1_B, SEL_SCIF1_1),
2426 IP8_11_8
[all...]
H A Dpfc-r8a77980.c65 #define GPSR1_22 F_(CANFD0_RX_A, IP8_11_8)
252 #define IP8_11_8 FM(CANFD0_RX_A) FM(RXDA_EXTFXR) FM(PWM1_B) FM(DU_CDE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
330 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 \
756 PINMUX_IPSR_MSEL(IP8_11_8, CANFD0_RX_A, SEL_CANFD0_0),
757 PINMUX_IPSR_GPSR(IP8_11_8, RXDA_EXTFXR),
758 PINMUX_IPSR_MSEL(IP8_11_8, PWM1_B, SEL_PWM1_1),
759 PINMUX_IPSR_GPSR(IP8_11_8, DU_CDE),
2848 IP8_11_8
H A Dpfc-r8a77995.c82 #define GPSR2_29 F_(NFALE, IP8_11_8)
269 #define IP8_11_8 FM(NFALE) FM(SCL2_B) FM(IRQ3_B) FM(PWM0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
369 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \
778 PINMUX_IPSR_GPSR(IP8_11_8, NFALE),
779 PINMUX_IPSR_MSEL(IP8_11_8, SCL2_B, SEL_I2C2_1),
780 PINMUX_IPSR_MSEL(IP8_11_8, IRQ3_B, SEL_IRQ_3_1),
781 PINMUX_IPSR_MSEL(IP8_11_8, PWM0_C, SEL_PWM0_1),
2707 IP8_11_8
H A Dpfc-r8a77990.c153 #define GPSR3_3 F_(SD0_DAT1, IP8_11_8)
284 #define IP8_11_8 FM(SD0_DAT1) FM(NFDATA11) FM(SDA2_C) FM(HCTS1_N_B) F_(0, 0) FM(FMIN_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
406 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \
986 PINMUX_IPSR_GPSR(IP8_11_8, SD0_DAT1),
987 PINMUX_IPSR_GPSR(IP8_11_8, NFDATA11),
988 PINMUX_IPSR_MSEL(IP8_11_8, SDA2_C, SEL_I2C2_2),
989 PINMUX_IPSR_MSEL(IP8_11_8, HCTS1_N_B, SEL_HSCIF1_1),
990 PINMUX_IPSR_MSEL(IP8_11_8, FMIN_B, SEL_FM_1),
4854 IP8_11_8
[all...]
H A Dpfc-r8a7779.c1132 PINMUX_IPSR_GPSR(IP8_11_8, HSPI_TX0),
1133 PINMUX_IPSR_GPSR(IP8_11_8, TX0),
1134 PINMUX_IPSR_GPSR(IP8_11_8, CAN_DEBUG_HW_TRIGGER),
1135 PINMUX_IPSR_GPSR(IP8_11_8, AD_DO),
1136 PINMUX_IPSR_GPSR(IP8_11_8, CC5_STATE6),
1137 PINMUX_IPSR_GPSR(IP8_11_8, CC5_STATE14),
1138 PINMUX_IPSR_GPSR(IP8_11_8, CC5_STATE22),
1139 PINMUX_IPSR_GPSR(IP8_11_8, CC5_STATE30),
1140 PINMUX_IPSR_GPSR(IP8_11_8, CC5_STATE38),
3757 /* IP8_11_8 [
[all...]
H A Dpfc-r8a77951.c157 #define GPSR3_6 F_(SD1_CLK, IP8_11_8)
324 #define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
466 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \
1059 PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK),
1060 PINMUX_IPSR_MSEL(IP8_11_8, MSIOF1_SCK_G, SEL_MSIOF1_6),
1061 PINMUX_IPSR_MSEL(IP8_11_8, SIM0_CLK_A, SEL_SIMCARD_0),
5475 IP8_11_8
H A Dpfc-r8a77965.c162 #define GPSR3_6 F_(SD1_CLK, IP8_11_8)
329 #define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
471 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \
1065 PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK),
1066 PINMUX_IPSR_MSEL(IP8_11_8, MSIOF1_SCK_G, SEL_MSIOF1_6),
1067 PINMUX_IPSR_MSEL(IP8_11_8, SIM0_CLK_A, SEL_SIMCARD_0),
5681 IP8_11_8
H A Dpfc-r8a7796.c162 #define GPSR3_6 F_(SD1_CLK, IP8_11_8)
329 #define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
471 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \
1063 PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK),
1064 PINMUX_IPSR_MSEL(IP8_11_8, MSIOF1_SCK_G, SEL_MSIOF1_6),
1065 PINMUX_IPSR_MSEL(IP8_11_8, SIM0_CLK_A, SEL_SIMCARD_0),
5428 IP8_11_8
H A Dpfc-r8a77950.c156 #define GPSR3_6 F_(SD1_CLK, IP8_11_8)
324 #define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
456 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \
1054 PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK),
1055 PINMUX_IPSR_MSEL(IP8_11_8, MSIOF1_SCK_G, SEL_MSIOF1_6),
1056 PINMUX_IPSR_MSEL(IP8_11_8, SIM0_CLK_A, SEL_SIMCARD_0),
5114 IP8_11_8
H A Dpfc-r8a77470.c782 PINMUX_IPSR_GPSR(IP8_11_8, VI1_DATA0),
783 PINMUX_IPSR_GPSR(IP8_11_8, AVB_RX_DV),
784 PINMUX_IPSR_GPSR(IP8_11_8, ETH_CRS_DV),
2991 /* IP8_11_8 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c74 #define GPSR1_23 F_(CANFD1_TX, IP8_11_8)
230 #define IP8_11_8 FM(CANFD1_TX) FM(FXR_TXDB) FM(PWM2_B) FM(TCLK1_B) FM(TX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
289 FM(IP8_11_8) IP8_11_8 \
706 PINMUX_IPSR_GPSR(IP8_11_8, CANFD1_TX),
707 PINMUX_IPSR_GPSR(IP8_11_8, FXR_TXDB),
708 PINMUX_IPSR_MSEL(IP8_11_8, PWM2_B, SEL_PWM2_1),
709 PINMUX_IPSR_MSEL(IP8_11_8, TCLK1_B, SEL_TMU_1),
710 PINMUX_IPSR_MSEL(IP8_11_8, TX1_B, SEL_SCIF1_1),
2320 IP8_11_8
[all...]
H A Dpfc-r8a77995.c93 #define GPSR2_29 F_(NFALE, IP8_11_8)
280 #define IP8_11_8 FM(NFALE) FM(SCL2_B) FM(IRQ3_B) FM(PWM0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
380 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \
789 PINMUX_IPSR_GPSR(IP8_11_8, NFALE),
790 PINMUX_IPSR_MSEL(IP8_11_8, SCL2_B, SEL_I2C2_1),
791 PINMUX_IPSR_MSEL(IP8_11_8, IRQ3_B, SEL_IRQ_3_1),
792 PINMUX_IPSR_MSEL(IP8_11_8, PWM0_C, SEL_PWM0_1),
2759 IP8_11_8
H A Dpfc-r8a77980.c77 #define GPSR1_22 F_(CANFD0_RX_A, IP8_11_8)
264 #define IP8_11_8 FM(CANFD0_RX_A) FM(RXDA_EXTFXR) FM(PWM1_B) FM(DU_CDE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
339 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 \
765 PINMUX_IPSR_MSEL(IP8_11_8, CANFD0_RX_A, SEL_CANFD0_0),
766 PINMUX_IPSR_GPSR(IP8_11_8, RXDA_EXTFXR),
767 PINMUX_IPSR_MSEL(IP8_11_8, PWM1_B, SEL_PWM1_1),
768 PINMUX_IPSR_GPSR(IP8_11_8, DU_CDE),
2772 IP8_11_8
H A Dpfc-r8a77990.c153 #define GPSR3_3 F_(SD0_DAT1, IP8_11_8)
284 #define IP8_11_8 FM(SD0_DAT1) FM(NFDATA11) FM(SDA2_C) FM(HCTS1_N_B) F_(0, 0) FM(FMIN_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
406 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \
987 PINMUX_IPSR_GPSR(IP8_11_8, SD0_DAT1),
988 PINMUX_IPSR_GPSR(IP8_11_8, NFDATA11),
989 PINMUX_IPSR_MSEL(IP8_11_8, SDA2_C, SEL_I2C2_2),
990 PINMUX_IPSR_MSEL(IP8_11_8, HCTS1_N_B, SEL_HSCIF1_1),
991 PINMUX_IPSR_MSEL(IP8_11_8, FMIN_B, SEL_FM_1),
4874 IP8_11_8
[all...]
H A Dpfc-r8a7779.c1195 PINMUX_IPSR_GPSR(IP8_11_8, HSPI_TX0),
1196 PINMUX_IPSR_GPSR(IP8_11_8, TX0),
1197 PINMUX_IPSR_GPSR(IP8_11_8, CAN_DEBUG_HW_TRIGGER),
1198 PINMUX_IPSR_GPSR(IP8_11_8, AD_DO),
1199 PINMUX_IPSR_GPSR(IP8_11_8, CC5_STATE6),
1200 PINMUX_IPSR_GPSR(IP8_11_8, CC5_STATE14),
1201 PINMUX_IPSR_GPSR(IP8_11_8, CC5_STATE22),
1202 PINMUX_IPSR_GPSR(IP8_11_8, CC5_STATE30),
1203 PINMUX_IPSR_GPSR(IP8_11_8, CC5_STATE38),
3869 /* IP8_11_8 [
[all...]
H A Dpfc-r8a77951.c156 #define GPSR3_6 F_(SD1_CLK, IP8_11_8)
323 #define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
465 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \
1058 PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK),
1059 PINMUX_IPSR_MSEL(IP8_11_8, MSIOF1_SCK_G, SEL_MSIOF1_6),
1060 PINMUX_IPSR_MSEL(IP8_11_8, SIM0_CLK_A, SEL_SIMCARD_0),
5435 IP8_11_8
H A Dpfc-r8a77965.c161 #define GPSR3_6 F_(SD1_CLK, IP8_11_8)
328 #define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
470 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \
1064 PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK),
1065 PINMUX_IPSR_MSEL(IP8_11_8, MSIOF1_SCK_G, SEL_MSIOF1_6),
1066 PINMUX_IPSR_MSEL(IP8_11_8, SIM0_CLK_A, SEL_SIMCARD_0),
5631 IP8_11_8
H A Dpfc-r8a7796.c161 #define GPSR3_6 F_(SD1_CLK, IP8_11_8)
328 #define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
470 FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \
1062 PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK),
1063 PINMUX_IPSR_MSEL(IP8_11_8, MSIOF1_SCK_G, SEL_MSIOF1_6),
1064 PINMUX_IPSR_MSEL(IP8_11_8, SIM0_CLK_A, SEL_SIMCARD_0),
5390 IP8_11_8
H A Dpfc-r8a77470.c792 PINMUX_IPSR_GPSR(IP8_11_8, VI1_DATA0),
793 PINMUX_IPSR_GPSR(IP8_11_8, AVB_RX_DV),
794 PINMUX_IPSR_GPSR(IP8_11_8, ETH_CRS_DV),
2900 /* IP8_11_8 [4] */

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