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Searched refs:IP6_27_24 (Results 1 - 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c110 #define GPSR3_14 F_(VI1_DATA10, IP6_27_24)
207 #define IP6_27_24 FM(VI1_DATA10) F_(0, 0) F_(0, 0) FM(D13) FM(MMC_D7) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
274 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
625 PINMUX_IPSR_GPSR(IP6_27_24, VI1_DATA10),
626 PINMUX_IPSR_GPSR(IP6_27_24, D13),
627 PINMUX_IPSR_GPSR(IP6_27_24, MMC_D7),
628 PINMUX_IPSR_MSEL(IP6_27_24, SDA3_B, SEL_I2C3_1),
2402 IP6_27_24
H A Dpfc-r8a77980.c124 #define GPSR3_14 F_(VI1_DATA10, IP6_27_24)
240 #define IP6_27_24 FM(VI1_DATA10) FM(TCLK2_A) F_(0, 0) FM(D13) FM(MMC_D5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
325 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
698 PINMUX_IPSR_GPSR(IP6_27_24, VI1_DATA10),
699 PINMUX_IPSR_MSEL(IP6_27_24, TCLK2_A, SEL_TMU_0),
700 PINMUX_IPSR_GPSR(IP6_27_24, D13),
701 PINMUX_IPSR_GPSR(IP6_27_24, MMC_D5),
2824 IP6_27_24
H A Dpfc-r8a77990.c76 #define GPSR0_9 F_(D9, IP6_27_24)
270 #define IP6_27_24 FM(D9) FM(MSIOF2_SYNC_A) F_(0, 0) F_(0, 0) FM(VI5_DATA10_A) FM(DU_DG0) FM(RIF3_SYNC_B) FM(HRX3_E) FM(LCDOUT8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
401 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
901 PINMUX_IPSR_GPSR(IP6_27_24, D9),
902 PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_SYNC_A, SEL_MSIOF2_0),
903 PINMUX_IPSR_MSEL(IP6_27_24, VI5_DATA10_A, SEL_VIN5_0),
904 PINMUX_IPSR_GPSR(IP6_27_24, DU_DG0),
905 PINMUX_IPSR_MSEL(IP6_27_24, RIF3_SYNC_B, SEL_DRIF3_1),
906 PINMUX_IPSR_MSEL(IP6_27_24, HRX3_
[all...]
H A Dpfc-r8a77995.c94 #define GPSR2_17 F_(VI4_DATA16, IP6_27_24)
255 #define IP6_27_24 FM(VI4_DATA16) FM(HRX3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
364 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
727 PINMUX_IPSR_GPSR(IP6_27_24, VI4_DATA16),
728 PINMUX_IPSR_MSEL(IP6_27_24, HRX3_A, SEL_HSCIF3_0),
2683 IP6_27_24
H A Dpfc-r8a77951.c86 #define GPSR0_11 F_(D11, IP6_27_24)
311 #define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_C) FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
461 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
991 PINMUX_IPSR_GPSR(IP6_27_24, D11),
992 PINMUX_IPSR_GPSR(IP6_27_24, LCDOUT3),
993 PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_TXD_D, SEL_MSIOF2_3),
994 PINMUX_IPSR_MSEL(IP6_27_24, HTX3_B, SEL_HSCIF3_1),
995 PINMUX_IPSR_MSEL(IP6_27_24, VI4_DATA3_A, SEL_VIN4_0),
996 PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_
[all...]
H A Dpfc-r8a77965.c91 #define GPSR0_11 F_(D11, IP6_27_24)
316 #define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_C) FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
466 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
997 PINMUX_IPSR_GPSR(IP6_27_24, D11),
998 PINMUX_IPSR_GPSR(IP6_27_24, LCDOUT3),
999 PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_TXD_D, SEL_MSIOF2_3),
1000 PINMUX_IPSR_MSEL(IP6_27_24, HTX3_B, SEL_HSCIF3_1),
1001 PINMUX_IPSR_MSEL(IP6_27_24, VI4_DATA3_A, SEL_VIN4_0),
1002 PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_
[all...]
H A Dpfc-r8a7796.c91 #define GPSR0_11 F_(D11, IP6_27_24)
316 #define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_C) FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
466 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
995 PINMUX_IPSR_GPSR(IP6_27_24, D11),
996 PINMUX_IPSR_GPSR(IP6_27_24, LCDOUT3),
997 PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_TXD_D, SEL_MSIOF2_3),
998 PINMUX_IPSR_MSEL(IP6_27_24, HTX3_B, SEL_HSCIF3_1),
999 PINMUX_IPSR_MSEL(IP6_27_24, VI4_DATA3_A, SEL_VIN4_0),
1000 PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_
[all...]
H A Dpfc-r8a77950.c86 #define GPSR0_11 F_(D11, IP6_27_24)
310 #define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_C) FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
451 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
984 PINMUX_IPSR_GPSR(IP6_27_24, D11),
985 PINMUX_IPSR_GPSR(IP6_27_24, LCDOUT3),
986 PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_TXD_D, SEL_MSIOF2_3),
987 PINMUX_IPSR_MSEL(IP6_27_24, HTX3_B, SEL_HSCIF3_1),
988 PINMUX_IPSR_MSEL(IP6_27_24, VI4_DATA3_A, SEL_VIN4_0),
989 PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_
[all...]
H A Dpfc-r8a77470.c748 PINMUX_IPSR_GPSR(IP6_27_24, DU0_DB5),
749 PINMUX_IPSR_MSEL(IP6_27_24, HRTS1_N_C, SEL_HSCIF1_2),
750 PINMUX_IPSR_GPSR(IP6_27_24, A21),
2923 /* IP6_27_24 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c121 #define GPSR3_14 F_(VI1_DATA10, IP6_27_24)
218 #define IP6_27_24 FM(VI1_DATA10) F_(0, 0) F_(0, 0) FM(D13) FM(MMC_D7) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
284 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
634 PINMUX_IPSR_GPSR(IP6_27_24, VI1_DATA10),
635 PINMUX_IPSR_GPSR(IP6_27_24, D13),
636 PINMUX_IPSR_GPSR(IP6_27_24, MMC_D7),
637 PINMUX_IPSR_MSEL(IP6_27_24, SDA3_B, SEL_I2C3_1),
2294 IP6_27_24
H A Dpfc-r8a77980.c136 #define GPSR3_14 F_(VI1_DATA10, IP6_27_24)
252 #define IP6_27_24 FM(VI1_DATA10) FM(TCLK2_A) F_(0, 0) FM(D13) FM(MMC_D5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
334 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
707 PINMUX_IPSR_GPSR(IP6_27_24, VI1_DATA10),
708 PINMUX_IPSR_MSEL(IP6_27_24, TCLK2_A, SEL_TMU_0),
709 PINMUX_IPSR_GPSR(IP6_27_24, D13),
710 PINMUX_IPSR_GPSR(IP6_27_24, MMC_D5),
2748 IP6_27_24
H A Dpfc-r8a77990.c76 #define GPSR0_9 F_(D9, IP6_27_24)
270 #define IP6_27_24 FM(D9) FM(MSIOF2_SYNC_A) F_(0, 0) F_(0, 0) FM(VI5_DATA10_A) FM(DU_DG0) FM(RIF3_SYNC_B) FM(HRX3_E) FM(LCDOUT8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
401 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
902 PINMUX_IPSR_GPSR(IP6_27_24, D9),
903 PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_SYNC_A, SEL_MSIOF2_0),
904 PINMUX_IPSR_MSEL(IP6_27_24, VI5_DATA10_A, SEL_VIN5_0),
905 PINMUX_IPSR_GPSR(IP6_27_24, DU_DG0),
906 PINMUX_IPSR_MSEL(IP6_27_24, RIF3_SYNC_B, SEL_DRIF3_1),
907 PINMUX_IPSR_MSEL(IP6_27_24, HRX3_
[all...]
H A Dpfc-r8a77995.c105 #define GPSR2_17 F_(VI4_DATA16, IP6_27_24)
266 #define IP6_27_24 FM(VI4_DATA16) FM(HRX3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
375 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
738 PINMUX_IPSR_GPSR(IP6_27_24, VI4_DATA16),
739 PINMUX_IPSR_MSEL(IP6_27_24, HRX3_A, SEL_HSCIF3_0),
2735 IP6_27_24
H A Dpfc-r8a77951.c85 #define GPSR0_11 F_(D11, IP6_27_24)
310 #define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_C) FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
460 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
990 PINMUX_IPSR_GPSR(IP6_27_24, D11),
991 PINMUX_IPSR_GPSR(IP6_27_24, LCDOUT3),
992 PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_TXD_D, SEL_MSIOF2_3),
993 PINMUX_IPSR_MSEL(IP6_27_24, HTX3_B, SEL_HSCIF3_1),
994 PINMUX_IPSR_MSEL(IP6_27_24, VI4_DATA3_A, SEL_VIN4_0),
995 PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_
[all...]
H A Dpfc-r8a77965.c90 #define GPSR0_11 F_(D11, IP6_27_24)
315 #define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_C) FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
465 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
996 PINMUX_IPSR_GPSR(IP6_27_24, D11),
997 PINMUX_IPSR_GPSR(IP6_27_24, LCDOUT3),
998 PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_TXD_D, SEL_MSIOF2_3),
999 PINMUX_IPSR_MSEL(IP6_27_24, HTX3_B, SEL_HSCIF3_1),
1000 PINMUX_IPSR_MSEL(IP6_27_24, VI4_DATA3_A, SEL_VIN4_0),
1001 PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_
[all...]
H A Dpfc-r8a7796.c90 #define GPSR0_11 F_(D11, IP6_27_24)
315 #define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_C) FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
465 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
994 PINMUX_IPSR_GPSR(IP6_27_24, D11),
995 PINMUX_IPSR_GPSR(IP6_27_24, LCDOUT3),
996 PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_TXD_D, SEL_MSIOF2_3),
997 PINMUX_IPSR_MSEL(IP6_27_24, HTX3_B, SEL_HSCIF3_1),
998 PINMUX_IPSR_MSEL(IP6_27_24, VI4_DATA3_A, SEL_VIN4_0),
999 PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_
[all...]
H A Dpfc-r8a77470.c758 PINMUX_IPSR_GPSR(IP6_27_24, DU0_DB5),
759 PINMUX_IPSR_MSEL(IP6_27_24, HRTS1_N_C, SEL_HSCIF1_2),
760 PINMUX_IPSR_GPSR(IP6_27_24, A21),
2836 /* IP6_27_24 [4] */

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