/kernel/linux/linux-5.10/drivers/pinctrl/renesas/ |
H A D | pfc-r8a77970.c | 121 #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12) 196 #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 271 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \ 570 PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N), 571 PINMUX_IPSR_GPSR(IP5_15_12, MSIOF1_SYNC), 572 PINMUX_IPSR_GPSR(IP5_15_12, D2), 2395 IP5_15_12
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H A D | pfc-r8a77980.c | 135 #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12) 229 #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 322 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \ 647 PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N), 648 PINMUX_IPSR_GPSR(IP5_15_12, MSIOF1_SYNC), 649 PINMUX_IPSR_GPSR(IP5_15_12, D2), 2817 IP5_15_12
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H A D | pfc-r8a77990.c | 89 #define GPSR1_21 F_(CS0_N, IP5_15_12) 259 #define IP5_15_12 FM(CS0_N) FM(SCL5) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR0) FM(VI4_DATA2_B) F_(0, 0) FM(LCDOUT16) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 398 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \ 819 PINMUX_IPSR_GPSR(IP5_15_12, CS0_N), 820 PINMUX_IPSR_GPSR(IP5_15_12, SCL5), 821 PINMUX_IPSR_GPSR(IP5_15_12, DU_DR0), 822 PINMUX_IPSR_MSEL(IP5_15_12, VI4_DATA2_B, SEL_VIN4_1), 823 PINMUX_IPSR_GPSR(IP5_15_12, LCDOUT16), 4823 IP5_15_12 [all...] |
H A D | pfc-r8a77995.c | 105 #define GPSR2_6 F_(VI4_DATA5, IP5_15_12) 244 #define IP5_15_12 FM(VI4_DATA5) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 361 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \ 691 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA5), 692 PINMUX_IPSR_MSEL(IP5_15_12, SCK4_A, SEL_SCIF4_0), 2676 IP5_15_12
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H A D | pfc-r8a77951.c | 97 #define GPSR0_0 F_(D0, IP5_15_12) 300 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 458 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \ 927 PINMUX_IPSR_GPSR(IP5_15_12, D0), 928 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1), 929 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0), 930 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16), 931 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0), 5444 IP5_15_12 [all...] |
H A D | pfc-r8a77965.c | 102 #define GPSR0_0 F_(D0, IP5_15_12) 305 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 463 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \ 933 PINMUX_IPSR_GPSR(IP5_15_12, D0), 934 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1), 935 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0), 936 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16), 937 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0), 5650 IP5_15_12 [all...] |
H A D | pfc-r8a7796.c | 102 #define GPSR0_0 F_(D0, IP5_15_12) 305 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 463 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \ 931 PINMUX_IPSR_GPSR(IP5_15_12, D0), 932 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1), 933 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0), 934 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16), 935 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0), 5397 IP5_15_12 [all...] |
H A D | pfc-r8a77950.c | 97 #define GPSR0_0 F_(D0, IP5_15_12) 299 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 448 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \ 920 PINMUX_IPSR_GPSR(IP5_15_12, D0), 921 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1), 922 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0), 923 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16), 924 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0), 5083 IP5_15_12 [all...] |
H A D | pfc-r8a77470.c | 708 PINMUX_IPSR_GPSR(IP5_15_12, DU0_DG2), 709 PINMUX_IPSR_MSEL(IP5_15_12, RX4_D, SEL_SCIF4_3), 710 PINMUX_IPSR_GPSR(IP5_15_12, A10), 2904 /* IP5_15_12 [4] */
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/kernel/linux/linux-6.6/drivers/pinctrl/renesas/ |
H A D | pfc-r8a77970.c | 132 #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12) 207 #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 281 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \ 579 PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N), 580 PINMUX_IPSR_GPSR(IP5_15_12, MSIOF1_SYNC), 581 PINMUX_IPSR_GPSR(IP5_15_12, D2), 2287 IP5_15_12
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H A D | pfc-r8a77980.c | 147 #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12) 241 #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 331 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \ 656 PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N), 657 PINMUX_IPSR_GPSR(IP5_15_12, MSIOF1_SYNC), 658 PINMUX_IPSR_GPSR(IP5_15_12, D2), 2741 IP5_15_12
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H A D | pfc-r8a77990.c | 89 #define GPSR1_21 F_(CS0_N, IP5_15_12) 259 #define IP5_15_12 FM(CS0_N) FM(SCL5) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR0) FM(VI4_DATA2_B) F_(0, 0) FM(LCDOUT16) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 398 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \ 820 PINMUX_IPSR_GPSR(IP5_15_12, CS0_N), 821 PINMUX_IPSR_GPSR(IP5_15_12, SCL5), 822 PINMUX_IPSR_GPSR(IP5_15_12, DU_DR0), 823 PINMUX_IPSR_MSEL(IP5_15_12, VI4_DATA2_B, SEL_VIN4_1), 824 PINMUX_IPSR_GPSR(IP5_15_12, LCDOUT16), 4843 IP5_15_12 [all...] |
H A D | pfc-r8a77995.c | 116 #define GPSR2_6 F_(VI4_DATA5, IP5_15_12) 255 #define IP5_15_12 FM(VI4_DATA5) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 372 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \ 702 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA5), 703 PINMUX_IPSR_MSEL(IP5_15_12, SCK4_A, SEL_SCIF4_0), 2728 IP5_15_12
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H A D | pfc-r8a77951.c | 96 #define GPSR0_0 F_(D0, IP5_15_12) 299 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 457 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \ 926 PINMUX_IPSR_GPSR(IP5_15_12, D0), 927 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1), 928 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0), 929 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16), 930 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0), 5402 IP5_15_12 [all...] |
H A D | pfc-r8a77965.c | 101 #define GPSR0_0 F_(D0, IP5_15_12) 304 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 462 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \ 932 PINMUX_IPSR_GPSR(IP5_15_12, D0), 933 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1), 934 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0), 935 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16), 936 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0), 5598 IP5_15_12 [all...] |
H A D | pfc-r8a7796.c | 101 #define GPSR0_0 F_(D0, IP5_15_12) 304 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 462 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \ 930 PINMUX_IPSR_GPSR(IP5_15_12, D0), 931 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1), 932 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0), 933 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16), 934 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0), 5357 IP5_15_12 [all...] |
H A D | pfc-r8a77470.c | 718 PINMUX_IPSR_GPSR(IP5_15_12, DU0_DG2), 719 PINMUX_IPSR_MSEL(IP5_15_12, RX4_D, SEL_SCIF4_3), 720 PINMUX_IPSR_GPSR(IP5_15_12, A10), 2819 /* IP5_15_12 [4] */
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