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Searched refs:IP2_27_24 (Results 1 - 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c86 #define GPSR1_0 F_(IRQ0, IP2_27_24)
175 #define IP2_27_24 FM(IRQ0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
265 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
473 PINMUX_IPSR_GPSR(IP2_27_24, IRQ0),
2362 IP2_27_24
H A Dpfc-r8a77995.c62 #define GPSR1_15 F_(DU_DG7, IP2_27_24)
221 #define IP2_27_24 FM(DU_DG7) FM(LCDOUT15) FM(SCK4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
355 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
610 PINMUX_IPSR_GPSR(IP2_27_24, DU_DG7),
611 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT15),
612 PINMUX_IPSR_MSEL(IP2_27_24, SCK4_B, SEL_SCIF4_1),
2643 IP2_27_24
H A Dpfc-r8a77990.c113 #define GPSR2_25 F_(EX_WAIT0, IP2_27_24)
236 #define IP2_27_24 FM(EX_WAIT0) FM(SDA7_A) FM(AVB_AVTP_CAPTURE) FM(VI4_HSYNC_N) FM(RX5_B) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
392 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
646 PINMUX_IPSR_GPSR(IP2_27_24, EX_WAIT0),
647 PINMUX_IPSR_MSEL(IP2_27_24, SDA7_A, SEL_I2C7_0),
648 PINMUX_IPSR_GPSR(IP2_27_24, AVB_AVTP_CAPTURE),
649 PINMUX_IPSR_GPSR(IP2_27_24, VI4_HSYNC_N),
650 PINMUX_IPSR_MSEL(IP2_27_24, RX5_B, SEL_SCIF5_1),
651 PINMUX_IPSR_MSEL(IP2_27_24, PWM6_
[all...]
H A Dpfc-r8a77980.c87 #define GPSR1_0 F_(IRQ0, IP2_27_24)
208 #define IP2_27_24 FM(IRQ0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
316 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
557 PINMUX_IPSR_GPSR(IP2_27_24, IRQ0),
2784 IP2_27_24
H A Dpfc-r8a77951.c121 #define GPSR1_7 F_(A7, IP2_27_24)
279 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) FM(DU_DB7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
452 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
788 PINMUX_IPSR_GPSR(IP2_27_24, A7),
789 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
790 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
791 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
792 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
793 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA1
[all...]
H A Dpfc-r8a77965.c126 #define GPSR1_7 F_(A7, IP2_27_24)
282 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) FM(DU_DB7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
457 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
794 PINMUX_IPSR_GPSR(IP2_27_24, A7),
795 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
796 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
797 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
798 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
799 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA1
[all...]
H A Dpfc-r8a7796.c126 #define GPSR1_7 F_(A7, IP2_27_24)
282 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) FM(DU_DB7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
457 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
792 PINMUX_IPSR_GPSR(IP2_27_24, A7),
793 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
794 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
795 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
796 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
797 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA1
[all...]
H A Dpfc-r8a77950.c120 #define GPSR1_7 F_(A7, IP2_27_24)
278 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) FM(DU_DB7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
442 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
781 PINMUX_IPSR_GPSR(IP2_27_24, A7),
782 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
783 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
784 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
785 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
786 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA1
[all...]
H A Dpfc-r8a77470.c629 PINMUX_IPSR_GPSR(IP2_27_24, D12),
630 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SCK_A, SEL_MSIOF2_0),
631 PINMUX_IPSR_GPSR(IP2_27_24, HSCK0),
632 PINMUX_IPSR_MSEL(IP2_27_24, CAN_CLK_C, SEL_CANCLK_2),
2810 /* IP2_27_24 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c97 #define GPSR1_0 F_(IRQ0, IP2_27_24)
186 #define IP2_27_24 FM(IRQ0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
275 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
482 PINMUX_IPSR_GPSR(IP2_27_24, IRQ0),
2254 IP2_27_24
H A Dpfc-r8a77995.c73 #define GPSR1_15 F_(DU_DG7, IP2_27_24)
232 #define IP2_27_24 FM(DU_DG7) FM(LCDOUT15) FM(SCK4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
366 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
621 PINMUX_IPSR_GPSR(IP2_27_24, DU_DG7),
622 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT15),
623 PINMUX_IPSR_MSEL(IP2_27_24, SCK4_B, SEL_SCIF4_1),
2695 IP2_27_24
H A Dpfc-r8a77990.c113 #define GPSR2_25 F_(EX_WAIT0, IP2_27_24)
236 #define IP2_27_24 FM(EX_WAIT0) FM(SDA7_A) FM(AVB_AVTP_CAPTURE) FM(VI4_HSYNC_N) FM(RX5_B) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
392 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
647 PINMUX_IPSR_GPSR(IP2_27_24, EX_WAIT0),
648 PINMUX_IPSR_MSEL(IP2_27_24, SDA7_A, SEL_I2C7_0),
649 PINMUX_IPSR_GPSR(IP2_27_24, AVB_AVTP_CAPTURE),
650 PINMUX_IPSR_GPSR(IP2_27_24, VI4_HSYNC_N),
651 PINMUX_IPSR_MSEL(IP2_27_24, RX5_B, SEL_SCIF5_1),
652 PINMUX_IPSR_MSEL(IP2_27_24, PWM6_
[all...]
H A Dpfc-r8a77980.c99 #define GPSR1_0 F_(IRQ0, IP2_27_24)
220 #define IP2_27_24 FM(IRQ0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
325 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
566 PINMUX_IPSR_GPSR(IP2_27_24, IRQ0),
2708 IP2_27_24
H A Dpfc-r8a77951.c120 #define GPSR1_7 F_(A7, IP2_27_24)
278 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) FM(DU_DB7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
451 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
787 PINMUX_IPSR_GPSR(IP2_27_24, A7),
788 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
789 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
790 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
791 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
792 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA1
[all...]
H A Dpfc-r8a77965.c125 #define GPSR1_7 F_(A7, IP2_27_24)
281 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) FM(DU_DB7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
456 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
793 PINMUX_IPSR_GPSR(IP2_27_24, A7),
794 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
795 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
796 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
797 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
798 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA1
[all...]
H A Dpfc-r8a7796.c125 #define GPSR1_7 F_(A7, IP2_27_24)
281 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) FM(DU_DB7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
456 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
791 PINMUX_IPSR_GPSR(IP2_27_24, A7),
792 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
793 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
794 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
795 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
796 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA1
[all...]
H A Dpfc-r8a77470.c639 PINMUX_IPSR_GPSR(IP2_27_24, D12),
640 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SCK_A, SEL_MSIOF2_0),
641 PINMUX_IPSR_GPSR(IP2_27_24, HSCK0),
642 PINMUX_IPSR_MSEL(IP2_27_24, CAN_CLK_C, SEL_CANCLK_2),
2731 /* IP2_27_24 [4] */

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