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Searched refs:IP2_19_16 (Results 1 - 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c36 #define GPSR0_20 F_(DU_EXVSYNC_DU_VSYNC, IP2_19_16)
173 #define IP2_19_16 FM(DU_EXVSYNC_DU_VSYNC) FM(MSIOF3_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
263 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
467 PINMUX_IPSR_GPSR(IP2_19_16, DU_EXVSYNC_DU_VSYNC),
468 PINMUX_IPSR_GPSR(IP2_19_16, MSIOF3_SCK),
2364 IP2_19_16
H A Dpfc-r8a77990.c115 #define GPSR2_23 F_(RD_N, IP2_19_16)
234 #define IP2_19_16 FM(RD_N) FM(PWM1_A) FM(AVB_LINK) FM(VI4_FIELD) F_(0, 0) FM(RX3_C) FM(FSCLKST2_N_A) FM(VI5_DATA0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
390 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
630 PINMUX_IPSR_GPSR(IP2_19_16, RD_N),
631 PINMUX_IPSR_MSEL(IP2_19_16, PWM1_A, SEL_PWM1_0),
632 PINMUX_IPSR_GPSR(IP2_19_16, AVB_LINK),
633 PINMUX_IPSR_GPSR(IP2_19_16, VI4_FIELD),
634 PINMUX_IPSR_MSEL(IP2_19_16, RX3_C, SEL_SCIF3_2),
635 PINMUX_IPSR_GPSR(IP2_19_16, FSCLKST2_N_
[all...]
H A Dpfc-r8a77980.c37 #define GPSR0_20 F_(DU_EXVSYNC_DU_VSYNC, IP2_19_16)
206 #define IP2_19_16 FM(DU_EXVSYNC_DU_VSYNC) FM(MSIOF3_SCK) F_(0, 0) F_(0, 0) FM(FXR_TXENB_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
314 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
550 PINMUX_IPSR_GPSR(IP2_19_16, DU_EXVSYNC_DU_VSYNC),
551 PINMUX_IPSR_GPSR(IP2_19_16, MSIOF3_SCK),
552 PINMUX_IPSR_GPSR(IP2_19_16, FXR_TXENB_N),
2786 IP2_19_16
H A Dpfc-r8a77995.c64 #define GPSR1_13 F_(DU_DG5, IP2_19_16)
219 #define IP2_19_16 FM(DU_DG5) FM(LCDOUT13) FM(HTX3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
353 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
602 PINMUX_IPSR_GPSR(IP2_19_16, DU_DG5),
603 PINMUX_IPSR_GPSR(IP2_19_16, LCDOUT13),
604 PINMUX_IPSR_MSEL(IP2_19_16, HTX3_B, SEL_HSCIF3_1),
2645 IP2_19_16
H A Dpfc-r8a77951.c123 #define GPSR1_5 F_(A5, IP2_19_16)
277 #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
450 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
772 PINMUX_IPSR_GPSR(IP2_19_16, A5),
773 PINMUX_IPSR_GPSR(IP2_19_16, LCDOUT21),
774 PINMUX_IPSR_MSEL(IP2_19_16, MSIOF3_SS2_B, SEL_MSIOF3_1),
775 PINMUX_IPSR_MSEL(IP2_19_16, SCK4_B, SEL_SCIF4_1),
776 PINMUX_IPSR_GPSR(IP2_19_16, VI4_DATA13),
777 PINMUX_IPSR_GPSR(IP2_19_16, VI5_DATA1
[all...]
H A Dpfc-r8a77965.c128 #define GPSR1_5 F_(A5, IP2_19_16)
280 #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
455 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
778 PINMUX_IPSR_GPSR(IP2_19_16, A5),
779 PINMUX_IPSR_GPSR(IP2_19_16, LCDOUT21),
780 PINMUX_IPSR_MSEL(IP2_19_16, MSIOF3_SS2_B, SEL_MSIOF3_1),
781 PINMUX_IPSR_MSEL(IP2_19_16, SCK4_B, SEL_SCIF4_1),
782 PINMUX_IPSR_GPSR(IP2_19_16, VI4_DATA13),
783 PINMUX_IPSR_GPSR(IP2_19_16, VI5_DATA1
[all...]
H A Dpfc-r8a7796.c128 #define GPSR1_5 F_(A5, IP2_19_16)
280 #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
455 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
776 PINMUX_IPSR_GPSR(IP2_19_16, A5),
777 PINMUX_IPSR_GPSR(IP2_19_16, LCDOUT21),
778 PINMUX_IPSR_MSEL(IP2_19_16, MSIOF3_SS2_B, SEL_MSIOF3_1),
779 PINMUX_IPSR_MSEL(IP2_19_16, SCK4_B, SEL_SCIF4_1),
780 PINMUX_IPSR_GPSR(IP2_19_16, VI4_DATA13),
781 PINMUX_IPSR_GPSR(IP2_19_16, VI5_DATA1
[all...]
H A Dpfc-r8a77950.c122 #define GPSR1_5 F_(A5, IP2_19_16)
276 #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
440 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
765 PINMUX_IPSR_GPSR(IP2_19_16, A5),
766 PINMUX_IPSR_GPSR(IP2_19_16, LCDOUT21),
767 PINMUX_IPSR_MSEL(IP2_19_16, MSIOF3_SS2_B, SEL_MSIOF3_1),
768 PINMUX_IPSR_MSEL(IP2_19_16, SCK4_B, SEL_SCIF4_1),
769 PINMUX_IPSR_GPSR(IP2_19_16, VI4_DATA13),
770 PINMUX_IPSR_GPSR(IP2_19_16, VI5_DATA1
[all...]
H A Dpfc-r8a77470.c623 PINMUX_IPSR_GPSR(IP2_19_16, D10),
624 PINMUX_IPSR_MSEL(IP2_19_16, MSIOF2_RXD_A, SEL_MSIOF2_0),
625 PINMUX_IPSR_MSEL(IP2_19_16, HRX0_B, SEL_HSCIF0_1),
2816 /* IP2_19_16 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c47 #define GPSR0_20 F_(DU_EXVSYNC_DU_VSYNC, IP2_19_16)
184 #define IP2_19_16 FM(DU_EXVSYNC_DU_VSYNC) FM(MSIOF3_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
273 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
476 PINMUX_IPSR_GPSR(IP2_19_16, DU_EXVSYNC_DU_VSYNC),
477 PINMUX_IPSR_GPSR(IP2_19_16, MSIOF3_SCK),
2256 IP2_19_16
H A Dpfc-r8a77990.c115 #define GPSR2_23 F_(RD_N, IP2_19_16)
234 #define IP2_19_16 FM(RD_N) FM(PWM1_A) FM(AVB_LINK) FM(VI4_FIELD) F_(0, 0) FM(RX3_C) FM(FSCLKST2_N_A) FM(VI5_DATA0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
390 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
631 PINMUX_IPSR_GPSR(IP2_19_16, RD_N),
632 PINMUX_IPSR_MSEL(IP2_19_16, PWM1_A, SEL_PWM1_0),
633 PINMUX_IPSR_GPSR(IP2_19_16, AVB_LINK),
634 PINMUX_IPSR_GPSR(IP2_19_16, VI4_FIELD),
635 PINMUX_IPSR_MSEL(IP2_19_16, RX3_C, SEL_SCIF3_2),
636 PINMUX_IPSR_GPSR(IP2_19_16, FSCLKST2_N_
[all...]
H A Dpfc-r8a77995.c75 #define GPSR1_13 F_(DU_DG5, IP2_19_16)
230 #define IP2_19_16 FM(DU_DG5) FM(LCDOUT13) FM(HTX3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
364 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
613 PINMUX_IPSR_GPSR(IP2_19_16, DU_DG5),
614 PINMUX_IPSR_GPSR(IP2_19_16, LCDOUT13),
615 PINMUX_IPSR_MSEL(IP2_19_16, HTX3_B, SEL_HSCIF3_1),
2697 IP2_19_16
H A Dpfc-r8a77980.c49 #define GPSR0_20 F_(DU_EXVSYNC_DU_VSYNC, IP2_19_16)
218 #define IP2_19_16 FM(DU_EXVSYNC_DU_VSYNC) FM(MSIOF3_SCK) F_(0, 0) F_(0, 0) FM(FXR_TXENB_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
323 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
559 PINMUX_IPSR_GPSR(IP2_19_16, DU_EXVSYNC_DU_VSYNC),
560 PINMUX_IPSR_GPSR(IP2_19_16, MSIOF3_SCK),
561 PINMUX_IPSR_GPSR(IP2_19_16, FXR_TXENB_N),
2710 IP2_19_16
H A Dpfc-r8a77951.c122 #define GPSR1_5 F_(A5, IP2_19_16)
276 #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
449 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
771 PINMUX_IPSR_GPSR(IP2_19_16, A5),
772 PINMUX_IPSR_GPSR(IP2_19_16, LCDOUT21),
773 PINMUX_IPSR_MSEL(IP2_19_16, MSIOF3_SS2_B, SEL_MSIOF3_1),
774 PINMUX_IPSR_MSEL(IP2_19_16, SCK4_B, SEL_SCIF4_1),
775 PINMUX_IPSR_GPSR(IP2_19_16, VI4_DATA13),
776 PINMUX_IPSR_GPSR(IP2_19_16, VI5_DATA1
[all...]
H A Dpfc-r8a77965.c127 #define GPSR1_5 F_(A5, IP2_19_16)
279 #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
454 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
777 PINMUX_IPSR_GPSR(IP2_19_16, A5),
778 PINMUX_IPSR_GPSR(IP2_19_16, LCDOUT21),
779 PINMUX_IPSR_MSEL(IP2_19_16, MSIOF3_SS2_B, SEL_MSIOF3_1),
780 PINMUX_IPSR_MSEL(IP2_19_16, SCK4_B, SEL_SCIF4_1),
781 PINMUX_IPSR_GPSR(IP2_19_16, VI4_DATA13),
782 PINMUX_IPSR_GPSR(IP2_19_16, VI5_DATA1
[all...]
H A Dpfc-r8a7796.c127 #define GPSR1_5 F_(A5, IP2_19_16)
279 #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
454 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
775 PINMUX_IPSR_GPSR(IP2_19_16, A5),
776 PINMUX_IPSR_GPSR(IP2_19_16, LCDOUT21),
777 PINMUX_IPSR_MSEL(IP2_19_16, MSIOF3_SS2_B, SEL_MSIOF3_1),
778 PINMUX_IPSR_MSEL(IP2_19_16, SCK4_B, SEL_SCIF4_1),
779 PINMUX_IPSR_GPSR(IP2_19_16, VI4_DATA13),
780 PINMUX_IPSR_GPSR(IP2_19_16, VI5_DATA1
[all...]
H A Dpfc-r8a77470.c633 PINMUX_IPSR_GPSR(IP2_19_16, D10),
634 PINMUX_IPSR_MSEL(IP2_19_16, MSIOF2_RXD_A, SEL_MSIOF2_0),
635 PINMUX_IPSR_MSEL(IP2_19_16, HRX0_B, SEL_HSCIF0_1),
2737 /* IP2_19_16 [4] */

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