/kernel/linux/linux-5.10/drivers/pinctrl/renesas/ |
H A D | pfc-r8a77970.c | 38 #define GPSR0_18 F_(DU_DOTCLKOUT, IP2_11_8) 171 #define IP2_11_8 FM(DU_DOTCLKOUT) FM(SCIF_CLK_A) F_(0, 0) FM(A18) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 261 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 458 PINMUX_IPSR_GPSR(IP2_11_8, DU_DOTCLKOUT), 459 PINMUX_IPSR_MSEL(IP2_11_8, SCIF_CLK_A, SEL_HSCIF0_0), 460 PINMUX_IPSR_GPSR(IP2_11_8, A18), 2366 IP2_11_8
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H A D | pfc-r8a77980.c | 39 #define GPSR0_18 F_(DU_DOTCLKOUT, IP2_11_8) 204 #define IP2_11_8 FM(DU_DOTCLKOUT) FM(MSIOF3_SS1) FM(GETHER_LINK_B) FM(A18) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 312 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 539 PINMUX_IPSR_GPSR(IP2_11_8, DU_DOTCLKOUT), 540 PINMUX_IPSR_GPSR(IP2_11_8, MSIOF3_SS1), 541 PINMUX_IPSR_MSEL(IP2_11_8, GETHER_LINK_B, SEL_GETHER_1), 542 PINMUX_IPSR_GPSR(IP2_11_8, A18), 2788 IP2_11_8
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H A D | pfc-r8a77995.c | 66 #define GPSR1_11 F_(DU_DG3, IP2_11_8) 217 #define IP2_11_8 FM(DU_DG3) FM(LCDOUT11) FM(IRQ1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 351 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 594 PINMUX_IPSR_GPSR(IP2_11_8, DU_DG3), 595 PINMUX_IPSR_GPSR(IP2_11_8, LCDOUT11), 596 PINMUX_IPSR_MSEL(IP2_11_8, IRQ1_A, SEL_IRQ_1_0), 2647 IP2_11_8
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H A D | pfc-r8a7779.c | 751 PINMUX_IPSR_MSEL(IP2_11_8, HCTS0, SEL_HSCIF0_0), 752 PINMUX_IPSR_MSEL(IP2_11_8, CTS1, SEL_SCIF1_0), 753 PINMUX_IPSR_GPSR(IP2_11_8, STM), 754 PINMUX_IPSR_GPSR(IP2_11_8, PWM0_D), 755 PINMUX_IPSR_MSEL(IP2_11_8, RX0_C, SEL_SCIF0_2), 756 PINMUX_IPSR_MSEL(IP2_11_8, SCIF_CLK_C, SEL_SCIF_2), 757 PINMUX_IPSR_GPSR(IP2_11_8, SUB_TRST), 758 PINMUX_IPSR_MSEL(IP2_11_8, TCLK1_B, SEL_TMU1_1), 759 PINMUX_IPSR_GPSR(IP2_11_8, CC5_OSCOUT), 3488 /* IP2_11_8 [ [all...] |
H A D | pfc-r8a77470.c | 614 PINMUX_IPSR_GPSR(IP2_11_8, D8), 615 PINMUX_IPSR_GPSR(IP2_11_8, HCTS2_N), 616 PINMUX_IPSR_MSEL(IP2_11_8, RX1_C, SEL_SCIF1_2), 617 PINMUX_IPSR_MSEL(IP2_11_8, SCL1_D, SEL_I2C01_3), 618 PINMUX_IPSR_GPSR(IP2_11_8, PWM3_C), 2822 /* IP2_11_8 [4] */
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H A D | pfc-r8a77951.c | 125 #define GPSR1_3 F_(A3, IP2_11_8) 273 #define IP2_11_8 FM(A3) FM(LCDOUT19) FM(MSIOF3_RXD_B) F_(0, 0) FM(VI4_DATA11) F_(0, 0) FM(DU_DB3) F_(0, 0) F_(0, 0) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 448 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 758 PINMUX_IPSR_GPSR(IP2_11_8, A3), 759 PINMUX_IPSR_GPSR(IP2_11_8, LCDOUT19), 760 PINMUX_IPSR_MSEL(IP2_11_8, MSIOF3_RXD_B, SEL_MSIOF3_1), 761 PINMUX_IPSR_GPSR(IP2_11_8, VI4_DATA11), 762 PINMUX_IPSR_GPSR(IP2_11_8, DU_DB3), 763 PINMUX_IPSR_MSEL(IP2_11_8, PWM6_ [all...] |
H A D | pfc-r8a77965.c | 130 #define GPSR1_3 F_(A3, IP2_11_8) 278 #define IP2_11_8 FM(A3) FM(LCDOUT19) FM(MSIOF3_RXD_B) F_(0, 0) FM(VI4_DATA11) F_(0, 0) FM(DU_DB3) F_(0, 0) F_(0, 0) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 453 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 764 PINMUX_IPSR_GPSR(IP2_11_8, A3), 765 PINMUX_IPSR_GPSR(IP2_11_8, LCDOUT19), 766 PINMUX_IPSR_MSEL(IP2_11_8, MSIOF3_RXD_B, SEL_MSIOF3_1), 767 PINMUX_IPSR_GPSR(IP2_11_8, VI4_DATA11), 768 PINMUX_IPSR_GPSR(IP2_11_8, DU_DB3), 769 PINMUX_IPSR_MSEL(IP2_11_8, PWM6_ [all...] |
H A D | pfc-r8a7796.c | 130 #define GPSR1_3 F_(A3, IP2_11_8) 278 #define IP2_11_8 FM(A3) FM(LCDOUT19) FM(MSIOF3_RXD_B) F_(0, 0) FM(VI4_DATA11) F_(0, 0) FM(DU_DB3) F_(0, 0) F_(0, 0) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 453 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 762 PINMUX_IPSR_GPSR(IP2_11_8, A3), 763 PINMUX_IPSR_GPSR(IP2_11_8, LCDOUT19), 764 PINMUX_IPSR_MSEL(IP2_11_8, MSIOF3_RXD_B, SEL_MSIOF3_1), 765 PINMUX_IPSR_GPSR(IP2_11_8, VI4_DATA11), 766 PINMUX_IPSR_GPSR(IP2_11_8, DU_DB3), 767 PINMUX_IPSR_MSEL(IP2_11_8, PWM6_ [all...] |
H A D | pfc-r8a77950.c | 124 #define GPSR1_3 F_(A3, IP2_11_8) 272 #define IP2_11_8 FM(A3) FM(LCDOUT19) FM(MSIOF3_RXD_B) F_(0, 0) FM(VI4_DATA11) F_(0, 0) FM(DU_DB3) F_(0, 0) F_(0, 0) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 438 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 751 PINMUX_IPSR_GPSR(IP2_11_8, A3), 752 PINMUX_IPSR_GPSR(IP2_11_8, LCDOUT19), 753 PINMUX_IPSR_MSEL(IP2_11_8, MSIOF3_RXD_B, SEL_MSIOF3_1), 754 PINMUX_IPSR_GPSR(IP2_11_8, VI4_DATA11), 755 PINMUX_IPSR_GPSR(IP2_11_8, DU_DB3), 756 PINMUX_IPSR_MSEL(IP2_11_8, PWM6_ [all...] |
H A D | pfc-r8a77990.c | 232 #define IP2_11_8 FM(AVB_MDC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 388 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 621 PINMUX_IPSR_GPSR(IP2_11_8, AVB_MDC), 4794 IP2_11_8
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/kernel/linux/linux-6.6/drivers/pinctrl/renesas/ |
H A D | pfc-r8a77970.c | 49 #define GPSR0_18 F_(DU_DOTCLKOUT, IP2_11_8) 182 #define IP2_11_8 FM(DU_DOTCLKOUT) FM(SCIF_CLK_A) F_(0, 0) FM(A18) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 271 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 467 PINMUX_IPSR_GPSR(IP2_11_8, DU_DOTCLKOUT), 468 PINMUX_IPSR_MSEL(IP2_11_8, SCIF_CLK_A, SEL_HSCIF0_0), 469 PINMUX_IPSR_GPSR(IP2_11_8, A18), 2258 IP2_11_8
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H A D | pfc-r8a77980.c | 51 #define GPSR0_18 F_(DU_DOTCLKOUT, IP2_11_8) 216 #define IP2_11_8 FM(DU_DOTCLKOUT) FM(MSIOF3_SS1) FM(GETHER_LINK_B) FM(A18) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 321 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 548 PINMUX_IPSR_GPSR(IP2_11_8, DU_DOTCLKOUT), 549 PINMUX_IPSR_GPSR(IP2_11_8, MSIOF3_SS1), 550 PINMUX_IPSR_MSEL(IP2_11_8, GETHER_LINK_B, SEL_GETHER_1), 551 PINMUX_IPSR_GPSR(IP2_11_8, A18), 2712 IP2_11_8
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H A D | pfc-r8a77995.c | 77 #define GPSR1_11 F_(DU_DG3, IP2_11_8) 228 #define IP2_11_8 FM(DU_DG3) FM(LCDOUT11) FM(IRQ1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 362 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 605 PINMUX_IPSR_GPSR(IP2_11_8, DU_DG3), 606 PINMUX_IPSR_GPSR(IP2_11_8, LCDOUT11), 607 PINMUX_IPSR_MSEL(IP2_11_8, IRQ1_A, SEL_IRQ_1_0), 2699 IP2_11_8
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H A D | pfc-r8a7779.c | 814 PINMUX_IPSR_MSEL(IP2_11_8, HCTS0, SEL_HSCIF0_0), 815 PINMUX_IPSR_MSEL(IP2_11_8, CTS1, SEL_SCIF1_0), 816 PINMUX_IPSR_GPSR(IP2_11_8, STM), 817 PINMUX_IPSR_GPSR(IP2_11_8, PWM0_D), 818 PINMUX_IPSR_MSEL(IP2_11_8, RX0_C, SEL_SCIF0_2), 819 PINMUX_IPSR_MSEL(IP2_11_8, SCIF_CLK_C, SEL_SCIF_2), 820 PINMUX_IPSR_GPSR(IP2_11_8, SUB_TRST), 821 PINMUX_IPSR_MSEL(IP2_11_8, TCLK1_B, SEL_TMU1_1), 822 PINMUX_IPSR_GPSR(IP2_11_8, CC5_OSCOUT), 3605 /* IP2_11_8 [ [all...] |
H A D | pfc-r8a77470.c | 624 PINMUX_IPSR_GPSR(IP2_11_8, D8), 625 PINMUX_IPSR_GPSR(IP2_11_8, HCTS2_N), 626 PINMUX_IPSR_MSEL(IP2_11_8, RX1_C, SEL_SCIF1_2), 627 PINMUX_IPSR_MSEL(IP2_11_8, SCL1_D, SEL_I2C01_3), 628 PINMUX_IPSR_GPSR(IP2_11_8, PWM3_C), 2743 /* IP2_11_8 [4] */
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H A D | pfc-r8a77951.c | 124 #define GPSR1_3 F_(A3, IP2_11_8) 272 #define IP2_11_8 FM(A3) FM(LCDOUT19) FM(MSIOF3_RXD_B) F_(0, 0) FM(VI4_DATA11) F_(0, 0) FM(DU_DB3) F_(0, 0) F_(0, 0) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 447 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 757 PINMUX_IPSR_GPSR(IP2_11_8, A3), 758 PINMUX_IPSR_GPSR(IP2_11_8, LCDOUT19), 759 PINMUX_IPSR_MSEL(IP2_11_8, MSIOF3_RXD_B, SEL_MSIOF3_1), 760 PINMUX_IPSR_GPSR(IP2_11_8, VI4_DATA11), 761 PINMUX_IPSR_GPSR(IP2_11_8, DU_DB3), 762 PINMUX_IPSR_MSEL(IP2_11_8, PWM6_ [all...] |
H A D | pfc-r8a77965.c | 129 #define GPSR1_3 F_(A3, IP2_11_8) 277 #define IP2_11_8 FM(A3) FM(LCDOUT19) FM(MSIOF3_RXD_B) F_(0, 0) FM(VI4_DATA11) F_(0, 0) FM(DU_DB3) F_(0, 0) F_(0, 0) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 452 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 763 PINMUX_IPSR_GPSR(IP2_11_8, A3), 764 PINMUX_IPSR_GPSR(IP2_11_8, LCDOUT19), 765 PINMUX_IPSR_MSEL(IP2_11_8, MSIOF3_RXD_B, SEL_MSIOF3_1), 766 PINMUX_IPSR_GPSR(IP2_11_8, VI4_DATA11), 767 PINMUX_IPSR_GPSR(IP2_11_8, DU_DB3), 768 PINMUX_IPSR_MSEL(IP2_11_8, PWM6_ [all...] |
H A D | pfc-r8a7796.c | 129 #define GPSR1_3 F_(A3, IP2_11_8) 277 #define IP2_11_8 FM(A3) FM(LCDOUT19) FM(MSIOF3_RXD_B) F_(0, 0) FM(VI4_DATA11) F_(0, 0) FM(DU_DB3) F_(0, 0) F_(0, 0) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 452 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 761 PINMUX_IPSR_GPSR(IP2_11_8, A3), 762 PINMUX_IPSR_GPSR(IP2_11_8, LCDOUT19), 763 PINMUX_IPSR_MSEL(IP2_11_8, MSIOF3_RXD_B, SEL_MSIOF3_1), 764 PINMUX_IPSR_GPSR(IP2_11_8, VI4_DATA11), 765 PINMUX_IPSR_GPSR(IP2_11_8, DU_DB3), 766 PINMUX_IPSR_MSEL(IP2_11_8, PWM6_ [all...] |
H A D | pfc-r8a77990.c | 232 #define IP2_11_8 FM(AVB_MDC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 388 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 622 PINMUX_IPSR_GPSR(IP2_11_8, AVB_MDC), 4814 IP2_11_8
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