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Searched refs:IP1_27_24 (Results 1 - 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c42 #define GPSR0_14 F_(DU_DB4, IP1_27_24)
167 #define IP1_27_24 FM(DU_DB4) F_(0, 0) F_(0, 0) FM(A14) FM(FXR_CLKOUT2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
265 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
442 PINMUX_IPSR_GPSR(IP1_27_24, DU_DB4),
443 PINMUX_IPSR_GPSR(IP1_27_24, A14),
444 PINMUX_IPSR_GPSR(IP1_27_24, FXR_CLKOUT2),
2352 IP1_27_24
H A Dpfc-r8a77980.c43 #define GPSR0_14 F_(DU_DB4, IP1_27_24)
200 #define IP1_27_24 FM(DU_DB4) FM(HCTS0_N_A) F_(0, 0) FM(A14) FM(IRQ3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
316 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
520 PINMUX_IPSR_GPSR(IP1_27_24, DU_DB4),
521 PINMUX_IPSR_MSEL(IP1_27_24, HCTS0_N_A, SEL_HSCIF0_0),
522 PINMUX_IPSR_GPSR(IP1_27_24, A14),
523 PINMUX_IPSR_GPSR(IP1_27_24, IRQ3),
2774 IP1_27_24
H A Dpfc-r8a77995.c70 #define GPSR1_7 F_(DU_DB7, IP1_27_24)
213 #define IP1_27_24 FM(DU_DB7) FM(LCDOUT7) FM(MSIOF3_SS2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
355 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
578 PINMUX_IPSR_GPSR(IP1_27_24, DU_DB7),
579 PINMUX_IPSR_GPSR(IP1_27_24, LCDOUT7),
580 PINMUX_IPSR_MSEL(IP1_27_24, MSIOF3_SS2_B, SEL_MSIOF3_1),
2633 IP1_27_24
H A Dpfc-r8a77950.c136 #define GPSR2_8 F_(PWM2_A, IP1_27_24)
268 #define IP1_27_24 FM(PWM2_A) F_(0, 0) FM(A20) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
442 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
723 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, PWM2_A, I2C_SEL_3_0, SEL_PWM2_0),
724 PINMUX_IPSR_MSEL(IP1_27_24, A20, I2C_SEL_3_0),
725 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, HTX3_D, I2C_SEL_3_0, SEL_HSCIF3_3),
726 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, IETX_B, I2C_SEL_3_0, SEL_IEBUS_1),
727 PINMUX_IPSR_PHYS(IP1_27_24, SDA3, I2C_SEL_3_1),
5040 IP1_27_24
[all...]
H A Dpfc-r8a77990.c121 #define GPSR2_17 F_(AVB_RD1, IP1_27_24)
228 #define IP1_27_24 FM(AVB_RD1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
392 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
612 PINMUX_IPSR_GPSR(IP1_27_24, AVB_RD1),
4780 IP1_27_24
H A Dpfc-r8a77951.c137 #define GPSR2_8 F_(PWM2_A, IP1_27_24)
269 #define IP1_27_24 FM(PWM2_A) F_(0, 0) F_(0, 0) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
452 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
731 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, PWM2_A, I2C_SEL_3_0, SEL_PWM2_0),
732 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, HTX3_D, I2C_SEL_3_0, SEL_HSCIF3_3),
733 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, IETX_B, I2C_SEL_3_0, SEL_IEBUS_1),
734 PINMUX_IPSR_PHYS(IP1_27_24, SDA3, I2C_SEL_3_1),
5401 IP1_27_24
H A Dpfc-r8a77965.c142 #define GPSR2_8 F_(PWM2_A, IP1_27_24)
274 #define IP1_27_24 FM(PWM2_A) F_(0, 0) F_(0, 0) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
457 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
737 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, PWM2_A, I2C_SEL_3_0, SEL_PWM2_0),
738 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, HTX3_D, I2C_SEL_3_0, SEL_HSCIF3_3),
739 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, IETX_B, I2C_SEL_3_0, SEL_IEBUS_1),
740 PINMUX_IPSR_PHYS(IP1_27_24, SDA3, I2C_SEL_3_1),
5607 IP1_27_24
H A Dpfc-r8a7796.c142 #define GPSR2_8 F_(PWM2_A, IP1_27_24)
274 #define IP1_27_24 FM(PWM2_A) F_(0, 0) F_(0, 0) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
457 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
735 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, PWM2_A, I2C_SEL_3_0, SEL_PWM2_0),
736 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, HTX3_D, I2C_SEL_3_0, SEL_HSCIF3_3),
737 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, IETX_B, I2C_SEL_3_0, SEL_IEBUS_1),
738 PINMUX_IPSR_PHYS(IP1_27_24, SDA3, I2C_SEL_3_1),
5354 IP1_27_24
H A Dpfc-r8a77470.c594 PINMUX_IPSR_GPSR(IP1_27_24, D4),
595 PINMUX_IPSR_GPSR(IP1_27_24, IRQ3),
596 PINMUX_IPSR_MSEL(IP1_27_24, TCLK1_A, SEL_TMU1_0),
597 PINMUX_IPSR_GPSR(IP1_27_24, PWM6_C),
2782 /* IP1_27_24 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c53 #define GPSR0_14 F_(DU_DB4, IP1_27_24)
178 #define IP1_27_24 FM(DU_DB4) F_(0, 0) F_(0, 0) FM(A14) FM(FXR_CLKOUT2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
275 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
451 PINMUX_IPSR_GPSR(IP1_27_24, DU_DB4),
452 PINMUX_IPSR_GPSR(IP1_27_24, A14),
453 PINMUX_IPSR_GPSR(IP1_27_24, FXR_CLKOUT2),
2244 IP1_27_24
H A Dpfc-r8a77980.c55 #define GPSR0_14 F_(DU_DB4, IP1_27_24)
212 #define IP1_27_24 FM(DU_DB4) FM(HCTS0_N_A) F_(0, 0) FM(A14) FM(IRQ3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
325 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
529 PINMUX_IPSR_GPSR(IP1_27_24, DU_DB4),
530 PINMUX_IPSR_MSEL(IP1_27_24, HCTS0_N_A, SEL_HSCIF0_0),
531 PINMUX_IPSR_GPSR(IP1_27_24, A14),
532 PINMUX_IPSR_GPSR(IP1_27_24, IRQ3),
2698 IP1_27_24
H A Dpfc-r8a77995.c81 #define GPSR1_7 F_(DU_DB7, IP1_27_24)
224 #define IP1_27_24 FM(DU_DB7) FM(LCDOUT7) FM(MSIOF3_SS2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
366 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
589 PINMUX_IPSR_GPSR(IP1_27_24, DU_DB7),
590 PINMUX_IPSR_GPSR(IP1_27_24, LCDOUT7),
591 PINMUX_IPSR_MSEL(IP1_27_24, MSIOF3_SS2_B, SEL_MSIOF3_1),
2685 IP1_27_24
H A Dpfc-r8a77990.c121 #define GPSR2_17 F_(AVB_RD1, IP1_27_24)
228 #define IP1_27_24 FM(AVB_RD1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
392 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
613 PINMUX_IPSR_GPSR(IP1_27_24, AVB_RD1),
4800 IP1_27_24
H A Dpfc-r8a77951.c136 #define GPSR2_8 F_(PWM2_A, IP1_27_24)
268 #define IP1_27_24 FM(PWM2_A) F_(0, 0) F_(0, 0) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
451 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
730 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, PWM2_A, I2C_SEL_3_0, SEL_PWM2_0),
731 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, HTX3_D, I2C_SEL_3_0, SEL_HSCIF3_3),
732 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, IETX_B, I2C_SEL_3_0, SEL_IEBUS_1),
733 PINMUX_IPSR_PHYS(IP1_27_24, SDA3, I2C_SEL_3_1),
5359 IP1_27_24
H A Dpfc-r8a77965.c141 #define GPSR2_8 F_(PWM2_A, IP1_27_24)
273 #define IP1_27_24 FM(PWM2_A) F_(0, 0) F_(0, 0) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
456 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
736 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, PWM2_A, I2C_SEL_3_0, SEL_PWM2_0),
737 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, HTX3_D, I2C_SEL_3_0, SEL_HSCIF3_3),
738 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, IETX_B, I2C_SEL_3_0, SEL_IEBUS_1),
739 PINMUX_IPSR_PHYS(IP1_27_24, SDA3, I2C_SEL_3_1),
5555 IP1_27_24
H A Dpfc-r8a7796.c141 #define GPSR2_8 F_(PWM2_A, IP1_27_24)
273 #define IP1_27_24 FM(PWM2_A) F_(0, 0) F_(0, 0) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
456 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
734 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, PWM2_A, I2C_SEL_3_0, SEL_PWM2_0),
735 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, HTX3_D, I2C_SEL_3_0, SEL_HSCIF3_3),
736 PINMUX_IPSR_PHYS_MSEL(IP1_27_24, IETX_B, I2C_SEL_3_0, SEL_IEBUS_1),
737 PINMUX_IPSR_PHYS(IP1_27_24, SDA3, I2C_SEL_3_1),
5314 IP1_27_24
H A Dpfc-r8a77470.c604 PINMUX_IPSR_GPSR(IP1_27_24, D4),
605 PINMUX_IPSR_GPSR(IP1_27_24, IRQ3),
606 PINMUX_IPSR_MSEL(IP1_27_24, TCLK1_A, SEL_TMU1_0),
607 PINMUX_IPSR_GPSR(IP1_27_24, PWM6_C),
2705 /* IP1_27_24 [4] */

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