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Searched refs:IP1_11_8 (Results 1 - 19 of 19) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c46 #define GPSR0_10 F_(DU_DG6, IP1_11_8)
163 #define IP1_11_8 FM(DU_DG6) F_(0, 0) F_(0, 0) FM(A10) FM(FSO_TOE_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
261 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
426 PINMUX_IPSR_GPSR(IP1_11_8, DU_DG6),
427 PINMUX_IPSR_GPSR(IP1_11_8, A10),
428 PINMUX_IPSR_MSEL(IP1_11_8, FSO_TOE_N_A, SEL_RFSO_0),
2356 IP1_11_8
H A Dpfc-r8a77980.c47 #define GPSR0_10 F_(DU_DG6, IP1_11_8)
196 #define IP1_11_8 FM(DU_DG6) FM(SCIF_CLK_A) FM(GETHER_MDIO_B) FM(A10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
312 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
501 PINMUX_IPSR_GPSR(IP1_11_8, DU_DG6),
502 PINMUX_IPSR_MSEL(IP1_11_8, SCIF_CLK_A, SEL_HSCIF0_0),
503 PINMUX_IPSR_MSEL(IP1_11_8, GETHER_MDIO_B, SEL_GETHER_1),
504 PINMUX_IPSR_GPSR(IP1_11_8, A10),
2778 IP1_11_8
H A Dpfc-r8a77995.c74 #define GPSR1_3 F_(DU_DB3, IP1_11_8)
209 #define IP1_11_8 FM(DU_DB3) FM(LCDOUT3) FM(SCK5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
351 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
562 PINMUX_IPSR_GPSR(IP1_11_8, DU_DB3),
563 PINMUX_IPSR_GPSR(IP1_11_8, LCDOUT3),
564 PINMUX_IPSR_MSEL(IP1_11_8, SCK5_B, SEL_SCIF5_1),
2637 IP1_11_8
H A Dpfc-r8a77990.c127 #define GPSR2_11 F_(QSPI1_SSL, IP1_11_8)
224 #define IP1_11_8 FM(QSPI1_SSL) FM(RIF3_SYNC_A) FM(HSCK3_C) FM(VI4_DATA5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
388 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
595 PINMUX_IPSR_GPSR(IP1_11_8, QSPI1_SSL),
596 PINMUX_IPSR_MSEL(IP1_11_8, RIF3_SYNC_A, SEL_DRIF3_0),
597 PINMUX_IPSR_MSEL(IP1_11_8, HSCK3_C, SEL_HSCIF3_2),
598 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA5_A, SEL_VIN4_0),
4784 IP1_11_8
H A Dpfc-r8a77470.c572 PINMUX_IPSR_GPSR(IP1_11_8, D0),
573 PINMUX_IPSR_MSEL(IP1_11_8, SCL3_B, SEL_I2C03_1),
574 PINMUX_IPSR_MSEL(IP1_11_8, RX5_B, SEL_SCIF5_1),
575 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
576 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF2_RXD_C, SEL_MSIOF2_2),
577 PINMUX_IPSR_MSEL(IP1_11_8, SSI_SDATA5_B, SEL_SSI5_1),
2794 /* IP1_11_8 [4] */
H A Dpfc-r8a77951.c141 #define GPSR2_4 F_(IRQ4, IP1_11_8)
265 #define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) F_(0, 0) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
448 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
705 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
706 PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
707 PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
708 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
709 PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
710 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF3_RXD_
[all...]
H A Dpfc-r8a77965.c146 #define GPSR2_4 F_(IRQ4, IP1_11_8)
270 #define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) F_(0, 0) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
453 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
711 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
712 PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
713 PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
714 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
715 PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
716 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF3_RXD_
[all...]
H A Dpfc-r8a7796.c146 #define GPSR2_4 F_(IRQ4, IP1_11_8)
270 #define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) F_(0, 0) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
453 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
710 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
711 PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
712 PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
713 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
714 PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
715 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF3_RXD_
[all...]
H A Dpfc-r8a77950.c140 #define GPSR2_4 F_(IRQ4, IP1_11_8)
264 #define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) FM(A24) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
438 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
696 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
697 PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
698 PINMUX_IPSR_GPSR(IP1_11_8, A24),
699 PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
700 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
701 PINMUX_IPSR_MSEL(IP1_11_8, PWM5_
[all...]
H A Dpfc-r8a7790.c869 PINMUX_IPSR_GPSR(IP1_11_8, D11),
870 PINMUX_IPSR_MSEL(IP1_11_8, SCIFA1_CTS_N_C, SEL_SCIFA1_2),
871 PINMUX_IPSR_GPSR(IP1_11_8, AVB_TXD3),
872 PINMUX_IPSR_MSEL(IP1_11_8, VI0_G3, SEL_VI0_0),
873 PINMUX_IPSR_MSEL(IP1_11_8, VI0_G3_B, SEL_VI0_1),
874 PINMUX_IPSR_MSEL(IP1_11_8, VI2_DATA3_VI2_B3, SEL_VI2_0),
5149 /* IP1_11_8 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c57 #define GPSR0_10 F_(DU_DG6, IP1_11_8)
174 #define IP1_11_8 FM(DU_DG6) F_(0, 0) F_(0, 0) FM(A10) FM(FSO_TOE_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
271 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
435 PINMUX_IPSR_GPSR(IP1_11_8, DU_DG6),
436 PINMUX_IPSR_GPSR(IP1_11_8, A10),
437 PINMUX_IPSR_MSEL(IP1_11_8, FSO_TOE_N_A, SEL_RFSO_0),
2248 IP1_11_8
H A Dpfc-r8a77980.c59 #define GPSR0_10 F_(DU_DG6, IP1_11_8)
208 #define IP1_11_8 FM(DU_DG6) FM(SCIF_CLK_A) FM(GETHER_MDIO_B) FM(A10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
321 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
510 PINMUX_IPSR_GPSR(IP1_11_8, DU_DG6),
511 PINMUX_IPSR_MSEL(IP1_11_8, SCIF_CLK_A, SEL_HSCIF0_0),
512 PINMUX_IPSR_MSEL(IP1_11_8, GETHER_MDIO_B, SEL_GETHER_1),
513 PINMUX_IPSR_GPSR(IP1_11_8, A10),
2702 IP1_11_8
H A Dpfc-r8a77995.c85 #define GPSR1_3 F_(DU_DB3, IP1_11_8)
220 #define IP1_11_8 FM(DU_DB3) FM(LCDOUT3) FM(SCK5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
362 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
573 PINMUX_IPSR_GPSR(IP1_11_8, DU_DB3),
574 PINMUX_IPSR_GPSR(IP1_11_8, LCDOUT3),
575 PINMUX_IPSR_MSEL(IP1_11_8, SCK5_B, SEL_SCIF5_1),
2689 IP1_11_8
H A Dpfc-r8a77990.c127 #define GPSR2_11 F_(QSPI1_SSL, IP1_11_8)
224 #define IP1_11_8 FM(QSPI1_SSL) FM(RIF3_SYNC_A) FM(HSCK3_C) FM(VI4_DATA5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
388 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
596 PINMUX_IPSR_GPSR(IP1_11_8, QSPI1_SSL),
597 PINMUX_IPSR_MSEL(IP1_11_8, RIF3_SYNC_A, SEL_DRIF3_0),
598 PINMUX_IPSR_MSEL(IP1_11_8, HSCK3_C, SEL_HSCIF3_2),
599 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA5_A, SEL_VIN4_0),
4804 IP1_11_8
H A Dpfc-r8a77470.c582 PINMUX_IPSR_GPSR(IP1_11_8, D0),
583 PINMUX_IPSR_MSEL(IP1_11_8, SCL3_B, SEL_I2C03_1),
584 PINMUX_IPSR_MSEL(IP1_11_8, RX5_B, SEL_SCIF5_1),
585 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
586 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF2_RXD_C, SEL_MSIOF2_2),
587 PINMUX_IPSR_MSEL(IP1_11_8, SSI_SDATA5_B, SEL_SSI5_1),
2717 /* IP1_11_8 [4] */
H A Dpfc-r8a77951.c140 #define GPSR2_4 F_(IRQ4, IP1_11_8)
264 #define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) F_(0, 0) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
447 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
704 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
705 PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
706 PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
707 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
708 PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
709 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF3_RXD_
[all...]
H A Dpfc-r8a77965.c145 #define GPSR2_4 F_(IRQ4, IP1_11_8)
269 #define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) F_(0, 0) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
452 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
710 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
711 PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
712 PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
713 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
714 PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
715 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF3_RXD_
[all...]
H A Dpfc-r8a7796.c145 #define GPSR2_4 F_(IRQ4, IP1_11_8)
269 #define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) F_(0, 0) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
452 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
709 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
710 PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
711 PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
712 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
713 PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
714 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF3_RXD_
[all...]
H A Dpfc-r8a7790.c874 PINMUX_IPSR_GPSR(IP1_11_8, D11),
875 PINMUX_IPSR_MSEL(IP1_11_8, SCIFA1_CTS_N_C, SEL_SCIFA1_2),
876 PINMUX_IPSR_GPSR(IP1_11_8, AVB_TXD3),
877 PINMUX_IPSR_MSEL(IP1_11_8, VI0_G3, SEL_VI0_0),
878 PINMUX_IPSR_MSEL(IP1_11_8, VI0_G3_B, SEL_VI0_1),
879 PINMUX_IPSR_MSEL(IP1_11_8, VI2_DATA3_VI2_B3, SEL_VI2_0),
5184 /* IP1_11_8 [4] */

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