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Searched refs:IP0_27_24 (Results 1 - 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c50 #define GPSR0_6 F_(DU_DG2, IP0_27_24)
159 #define IP0_27_24 FM(DU_DG2) FM(MSIOF3_SS1) F_(0, 0) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
265 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
408 PINMUX_IPSR_GPSR(IP0_27_24, DU_DG2),
409 PINMUX_IPSR_GPSR(IP0_27_24, MSIOF3_SS1),
410 PINMUX_IPSR_GPSR(IP0_27_24, A6),
2342 IP0_27_24
H A Dpfc-r8a77995.c35 #define GPSR0_8 F_(MLB_SIG, IP0_27_24)
205 #define IP0_27_24 FM(MLB_SIG) FM(MSIOF2_SS2) FM(TX5_A) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
355 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
544 PINMUX_IPSR_GPSR(IP0_27_24, MLB_SIG),
545 PINMUX_IPSR_GPSR(IP0_27_24, MSIOF2_SS2),
546 PINMUX_IPSR_MSEL(IP0_27_24, TX5_A, SEL_SCIF5_0),
547 PINMUX_IPSR_MSEL(IP0_27_24, SDA3_B, SEL_I2C3_1),
2623 IP0_27_24
H A Dpfc-r8a77980.c51 #define GPSR0_6 F_(DU_DG2, IP0_27_24)
192 #define IP0_27_24 FM(DU_DG2) F_(0, 0) FM(GETHER_RMII_TXD1) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
316 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
481 PINMUX_IPSR_GPSR(IP0_27_24, DU_DG2),
482 PINMUX_IPSR_GPSR(IP0_27_24, GETHER_RMII_TXD1),
483 PINMUX_IPSR_GPSR(IP0_27_24, A6),
2764 IP0_27_24
H A Dpfc-r8a77990.c131 #define GPSR2_7 F_(QSPI1_MOSI_IO0, IP0_27_24)
220 #define IP0_27_24 FM(QSPI1_MOSI_IO0) FM(RIF2_SYNC_A) FM(HTX4_B) FM(VI4_DATA1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
392 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
574 PINMUX_IPSR_GPSR(IP0_27_24, QSPI1_MOSI_IO0),
575 PINMUX_IPSR_MSEL(IP0_27_24, RIF2_SYNC_A, SEL_DRIF2_0),
576 PINMUX_IPSR_GPSR(IP0_27_24, HTX4_B),
577 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA1_A, SEL_VIN4_0),
4770 IP0_27_24
H A Dpfc-r8a77951.c145 #define GPSR2_0 F_(IRQ0, IP0_27_24)
261 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
452 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
674 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
675 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
676 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
677 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
678 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
679 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_
[all...]
H A Dpfc-r8a77965.c150 #define GPSR2_0 F_(IRQ0, IP0_27_24)
266 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
457 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
680 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
681 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
682 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
683 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
684 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
685 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_
[all...]
H A Dpfc-r8a7796.c150 #define GPSR2_0 F_(IRQ0, IP0_27_24)
266 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
457 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
679 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
680 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
681 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
682 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
683 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
684 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_
[all...]
H A Dpfc-r8a77950.c144 #define GPSR2_0 F_(IRQ0, IP0_27_24)
260 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
442 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
668 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
669 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
670 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
671 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
672 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
673 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_
[all...]
H A Dpfc-r8a77470.c561 PINMUX_IPSR_GPSR(IP0_27_24, SD0_CD),
562 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_RX_A, SEL_CAN0_0),
2754 /* IP0_27_24 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c61 #define GPSR0_6 F_(DU_DG2, IP0_27_24)
170 #define IP0_27_24 FM(DU_DG2) FM(MSIOF3_SS1) F_(0, 0) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
275 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
417 PINMUX_IPSR_GPSR(IP0_27_24, DU_DG2),
418 PINMUX_IPSR_GPSR(IP0_27_24, MSIOF3_SS1),
419 PINMUX_IPSR_GPSR(IP0_27_24, A6),
2234 IP0_27_24
H A Dpfc-r8a77995.c46 #define GPSR0_8 F_(MLB_SIG, IP0_27_24)
216 #define IP0_27_24 FM(MLB_SIG) FM(MSIOF2_SS2) FM(TX5_A) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
366 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
555 PINMUX_IPSR_GPSR(IP0_27_24, MLB_SIG),
556 PINMUX_IPSR_GPSR(IP0_27_24, MSIOF2_SS2),
557 PINMUX_IPSR_MSEL(IP0_27_24, TX5_A, SEL_SCIF5_0),
558 PINMUX_IPSR_MSEL(IP0_27_24, SDA3_B, SEL_I2C3_1),
2675 IP0_27_24
H A Dpfc-r8a77980.c63 #define GPSR0_6 F_(DU_DG2, IP0_27_24)
204 #define IP0_27_24 FM(DU_DG2) F_(0, 0) FM(GETHER_RMII_TXD1) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
325 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
490 PINMUX_IPSR_GPSR(IP0_27_24, DU_DG2),
491 PINMUX_IPSR_GPSR(IP0_27_24, GETHER_RMII_TXD1),
492 PINMUX_IPSR_GPSR(IP0_27_24, A6),
2688 IP0_27_24
H A Dpfc-r8a77990.c131 #define GPSR2_7 F_(QSPI1_MOSI_IO0, IP0_27_24)
220 #define IP0_27_24 FM(QSPI1_MOSI_IO0) FM(RIF2_SYNC_A) FM(HTX4_B) FM(VI4_DATA1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
392 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
575 PINMUX_IPSR_GPSR(IP0_27_24, QSPI1_MOSI_IO0),
576 PINMUX_IPSR_MSEL(IP0_27_24, RIF2_SYNC_A, SEL_DRIF2_0),
577 PINMUX_IPSR_GPSR(IP0_27_24, HTX4_B),
578 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA1_A, SEL_VIN4_0),
4790 IP0_27_24
H A Dpfc-r8a77951.c144 #define GPSR2_0 F_(IRQ0, IP0_27_24)
260 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
451 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
673 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
674 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
675 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
676 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
677 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
678 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_
[all...]
H A Dpfc-r8a77965.c149 #define GPSR2_0 F_(IRQ0, IP0_27_24)
265 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
456 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
679 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
680 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
681 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
682 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
683 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
684 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_
[all...]
H A Dpfc-r8a7796.c149 #define GPSR2_0 F_(IRQ0, IP0_27_24)
265 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
456 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
678 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
679 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
680 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
681 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
682 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
683 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_
[all...]
H A Dpfc-r8a77470.c571 PINMUX_IPSR_GPSR(IP0_27_24, SD0_CD),
572 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_RX_A, SEL_CAN0_0),
2679 /* IP0_27_24 [4] */

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