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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
H A Dirq.c25 const irq_ID_t ID);
28 const irq_ID_t ID);
60 const irq_ID_t ID) in irq_clear_all()
64 assert(ID < N_IRQ_ID); in irq_clear_all()
65 assert(IRQ_N_CHANNEL[ID] <= HRT_DATA_WIDTH); in irq_clear_all()
67 if (IRQ_N_CHANNEL[ID] < HRT_DATA_WIDTH) { in irq_clear_all()
68 mask = ~((~(hrt_data)0) >> IRQ_N_CHANNEL[ID]); in irq_clear_all()
71 irq_reg_store(ID, in irq_clear_all()
80 const irq_ID_t ID, in irq_enable_channel()
83 unsigned int mask = irq_reg_load(ID, in irq_enable_channel()
59 irq_clear_all( const irq_ID_t ID) irq_clear_all() argument
79 irq_enable_channel( const irq_ID_t ID, const unsigned int irq_id) irq_enable_channel() argument
121 irq_enable_pulse( const irq_ID_t ID, bool pulse) irq_enable_pulse() argument
136 irq_disable_channel( const irq_ID_t ID, const unsigned int irq_id) irq_disable_channel() argument
167 irq_get_channel_id( const irq_ID_t ID, unsigned int *irq_id) irq_get_channel_id() argument
207 irq_raise( const irq_ID_t ID, const irq_sw_channel_id_t irq_id) irq_raise() argument
228 irq_controller_get_state(const irq_ID_t ID, struct irq_controller_state *state) irq_controller_get_state() argument
261 irq_ID_t ID = virq_get_irq_id(irq_ID, &channel_ID); cnd_virq_enable_channel() local
300 irq_ID_t ID; virq_get_channel_signals() local
328 irq_ID_t ID; virq_clear_info() local
345 irq_ID_t ID; virq_get_channel_id() local
408 irq_wait_for_write_complete( const irq_ID_t ID) irq_wait_for_write_complete() argument
417 any_irq_channel_enabled( const irq_ID_t ID) any_irq_channel_enabled() argument
434 irq_ID_t ID; virq_get_irq_id() local
[all...]
H A Dfifo_monitor.c44 const fifo_monitor_ID_t ID,
49 const fifo_monitor_ID_t ID,
54 const fifo_monitor_ID_t ID, in fifo_channel_get_state()
63 state->src_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
66 state->fifo_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
69 state->fifo_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
72 state->sink_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
77 state->src_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
80 state->fifo_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
83 state->fifo_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
53 fifo_channel_get_state( const fifo_monitor_ID_t ID, const fifo_channel_t channel_id, fifo_channel_state_t *state) fifo_channel_get_state() argument
508 fifo_switch_get_state( const fifo_monitor_ID_t ID, const fifo_switch_t switch_id, fifo_switch_state_t *state) fifo_switch_get_state() argument
530 fifo_monitor_get_state( const fifo_monitor_ID_t ID, fifo_monitor_state_t *state) fifo_monitor_get_state() argument
552 fifo_monitor_status_valid( const fifo_monitor_ID_t ID, const unsigned int reg, const unsigned int port_id) fifo_monitor_status_valid() argument
562 fifo_monitor_status_accept( const fifo_monitor_ID_t ID, const unsigned int reg, const unsigned int port_id) fifo_monitor_status_accept() argument
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H A Dinput_formatter.c61 const input_formatter_ID_t ID) in input_formatter_rst()
66 assert(ID < N_INPUT_FORMATTER_ID); in input_formatter_rst()
68 addr = HIVE_IF_SRST_ADDRESS[ID]; in input_formatter_rst()
69 rst = HIVE_IF_SRST_MASK[ID]; in input_formatter_rst()
75 if (!HIVE_IF_BIN_COPY[ID]) { in input_formatter_rst()
76 input_formatter_reg_store(ID, addr, rst); in input_formatter_rst()
83 const input_formatter_ID_t ID) in input_formatter_get_alignment()
85 assert(ID < N_INPUT_FORMATTER_ID); in input_formatter_get_alignment()
87 return input_formatter_alignment[ID]; in input_formatter_get_alignment()
91 const input_formatter_ID_t ID, in input_formatter_set_fifo_blocking_mode()
60 input_formatter_rst( const input_formatter_ID_t ID) input_formatter_rst() argument
82 input_formatter_get_alignment( const input_formatter_ID_t ID) input_formatter_get_alignment() argument
90 input_formatter_set_fifo_blocking_mode( const input_formatter_ID_t ID, const bool enable) input_formatter_set_fifo_blocking_mode() argument
104 input_formatter_get_switch_state( const input_formatter_ID_t ID, input_formatter_switch_state_t *state) input_formatter_get_switch_state() argument
138 input_formatter_get_state( const input_formatter_ID_t ID, input_formatter_state_t *state) input_formatter_get_state() argument
219 input_formatter_bin_get_state( const input_formatter_ID_t ID, input_formatter_bin_state_t *state) input_formatter_bin_get_state() argument
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H A Dsp_private.h26 const sp_ID_t ID, in sp_ctrl_store()
30 assert(ID < N_SP_ID); in sp_ctrl_store()
31 assert(SP_CTRL_BASE[ID] != (hrt_address)-1); in sp_ctrl_store()
32 ia_css_device_store_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in sp_ctrl_store()
37 const sp_ID_t ID,
40 assert(ID < N_SP_ID);
41 assert(SP_CTRL_BASE[ID] != (hrt_address)-1);
42 return ia_css_device_load_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data));
46 const sp_ID_t ID,
50 hrt_data val = sp_ctrl_load(ID, re
25 sp_ctrl_store( const sp_ID_t ID, const hrt_address reg, const hrt_data value) sp_ctrl_store() argument
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H A Dgp_device.c24 const gp_device_ID_t ID, in gp_device_get_state()
27 assert(ID < N_GP_DEVICE_ID); in gp_device_get_state()
30 state->syncgen_enable = gp_device_reg_load(ID, in gp_device_get_state()
32 state->syncgen_free_running = gp_device_reg_load(ID, in gp_device_get_state()
34 state->syncgen_pause = gp_device_reg_load(ID, in gp_device_get_state()
36 state->nr_frames = gp_device_reg_load(ID, in gp_device_get_state()
38 state->syngen_nr_pix = gp_device_reg_load(ID, in gp_device_get_state()
40 state->syngen_nr_pix = gp_device_reg_load(ID, in gp_device_get_state()
42 state->syngen_nr_lines = gp_device_reg_load(ID, in gp_device_get_state()
44 state->syngen_hblank_cycles = gp_device_reg_load(ID, in gp_device_get_state()
23 gp_device_get_state( const gp_device_ID_t ID, gp_device_state_t *state) gp_device_get_state() argument
[all...]
H A Disp_private.h31 const isp_ID_t ID, in isp_ctrl_store()
35 assert(ID < N_ISP_ID); in isp_ctrl_store()
36 assert(ISP_CTRL_BASE[ID] != (hrt_address) - 1); in isp_ctrl_store()
38 ia_css_device_store_uint32(ISP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in isp_ctrl_store()
40 hrt_master_port_store_32(ISP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in isp_ctrl_store()
46 const isp_ID_t ID,
49 assert(ID < N_ISP_ID);
50 assert(ISP_CTRL_BASE[ID] != (hrt_address) - 1);
52 return ia_css_device_load_uint32(ISP_CTRL_BASE[ID] + reg * sizeof(hrt_data));
54 return hrt_master_port_uload_32(ISP_CTRL_BASE[ID]
30 isp_ctrl_store( const isp_ID_t ID, const unsigned int reg, const hrt_data value) isp_ctrl_store() argument
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H A Disp.c28 const isp_ID_t ID, in cnd_isp_irq_enable()
32 isp_ctrl_setbit(ID, ISP_IRQ_READY_REG, ISP_IRQ_READY_BIT); in cnd_isp_irq_enable()
34 isp_ctrl_setbit(ID, ISP_IRQ_CLEAR_REG, ISP_IRQ_CLEAR_BIT); in cnd_isp_irq_enable()
36 isp_ctrl_clearbit(ID, ISP_IRQ_READY_REG, in cnd_isp_irq_enable()
43 const isp_ID_t ID, in isp_get_state()
47 hrt_data sc = isp_ctrl_load(ID, ISP_SC_REG); in isp_get_state()
58 state->pc = isp_ctrl_load(ID, ISP_PC_REG); in isp_get_state()
60 state->is_broken = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_BROKEN_BIT); in isp_get_state()
61 state->is_idle = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_IDLE_BIT); in isp_get_state()
62 state->is_sleeping = isp_ctrl_getbit(ID, ISP_SC_RE in isp_get_state()
27 cnd_isp_irq_enable( const isp_ID_t ID, const bool cnd) cnd_isp_irq_enable() argument
42 isp_get_state( const isp_ID_t ID, isp_state_t *state, isp_stall_t *stall) isp_get_state() argument
105 isp_is_ready(isp_ID_t ID) isp_is_ready() argument
112 isp_is_sleeping(isp_ID_t ID) isp_is_sleeping() argument
119 isp_start(isp_ID_t ID) isp_start() argument
125 isp_wake(isp_ID_t ID) isp_wake() argument
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H A Devent_fifo_private.h27 STORAGE_CLASS_EVENT_C void event_wait_for(const event_ID_t ID) in event_wait_for() argument
29 assert(ID < N_EVENT_ID); in event_wait_for()
30 assert(event_source_addr[ID] != ((hrt_address) - 1)); in event_wait_for()
31 (void)ia_css_device_load_uint32(event_source_addr[ID]); in event_wait_for()
35 STORAGE_CLASS_EVENT_C void cnd_event_wait_for(const event_ID_t ID,
39 event_wait_for(ID);
43 STORAGE_CLASS_EVENT_C hrt_data event_receive_token(const event_ID_t ID)
45 assert(ID < N_EVENT_ID);
46 assert(event_source_addr[ID] != ((hrt_address) - 1));
47 return ia_css_device_load_uint32(event_source_addr[ID]);
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/kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
H A Dirq.c25 const irq_ID_t ID);
28 const irq_ID_t ID);
60 const irq_ID_t ID) in irq_clear_all()
64 assert(ID < N_IRQ_ID); in irq_clear_all()
65 assert(IRQ_N_CHANNEL[ID] <= HRT_DATA_WIDTH); in irq_clear_all()
67 if (IRQ_N_CHANNEL[ID] < HRT_DATA_WIDTH) { in irq_clear_all()
68 mask = ~((~(hrt_data)0) >> IRQ_N_CHANNEL[ID]); in irq_clear_all()
71 irq_reg_store(ID, in irq_clear_all()
80 const irq_ID_t ID, in irq_enable_channel()
83 unsigned int mask = irq_reg_load(ID, in irq_enable_channel()
59 irq_clear_all( const irq_ID_t ID) irq_clear_all() argument
79 irq_enable_channel( const irq_ID_t ID, const unsigned int irq_id) irq_enable_channel() argument
121 irq_enable_pulse( const irq_ID_t ID, bool pulse) irq_enable_pulse() argument
136 irq_disable_channel( const irq_ID_t ID, const unsigned int irq_id) irq_disable_channel() argument
167 irq_get_channel_id( const irq_ID_t ID, unsigned int *irq_id) irq_get_channel_id() argument
207 irq_raise( const irq_ID_t ID, const irq_sw_channel_id_t irq_id) irq_raise() argument
228 irq_controller_get_state(const irq_ID_t ID, struct irq_controller_state *state) irq_controller_get_state() argument
261 irq_ID_t ID = virq_get_irq_id(irq_ID, &channel_ID); cnd_virq_enable_channel() local
300 irq_ID_t ID; virq_get_channel_signals() local
328 irq_ID_t ID; virq_clear_info() local
345 irq_ID_t ID; virq_get_channel_id() local
408 irq_wait_for_write_complete( const irq_ID_t ID) irq_wait_for_write_complete() argument
417 any_irq_channel_enabled( const irq_ID_t ID) any_irq_channel_enabled() argument
434 irq_ID_t ID; virq_get_irq_id() local
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H A Dfifo_monitor.c44 const fifo_monitor_ID_t ID,
49 const fifo_monitor_ID_t ID,
54 const fifo_monitor_ID_t ID, in fifo_channel_get_state()
63 state->src_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
66 state->fifo_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
69 state->fifo_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
72 state->sink_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
77 state->src_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
80 state->fifo_accept = fifo_monitor_status_accept(ID, in fifo_channel_get_state()
83 state->fifo_valid = fifo_monitor_status_valid(ID, in fifo_channel_get_state()
53 fifo_channel_get_state( const fifo_monitor_ID_t ID, const fifo_channel_t channel_id, fifo_channel_state_t *state) fifo_channel_get_state() argument
508 fifo_switch_get_state( const fifo_monitor_ID_t ID, const fifo_switch_t switch_id, fifo_switch_state_t *state) fifo_switch_get_state() argument
530 fifo_monitor_get_state( const fifo_monitor_ID_t ID, fifo_monitor_state_t *state) fifo_monitor_get_state() argument
552 fifo_monitor_status_valid( const fifo_monitor_ID_t ID, const unsigned int reg, const unsigned int port_id) fifo_monitor_status_valid() argument
562 fifo_monitor_status_accept( const fifo_monitor_ID_t ID, const unsigned int reg, const unsigned int port_id) fifo_monitor_status_accept() argument
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H A Dinput_formatter.c61 const input_formatter_ID_t ID) in input_formatter_rst()
66 assert(ID < N_INPUT_FORMATTER_ID); in input_formatter_rst()
68 addr = HIVE_IF_SRST_ADDRESS[ID]; in input_formatter_rst()
69 rst = HIVE_IF_SRST_MASK[ID]; in input_formatter_rst()
75 if (!HIVE_IF_BIN_COPY[ID]) { in input_formatter_rst()
76 input_formatter_reg_store(ID, addr, rst); in input_formatter_rst()
83 const input_formatter_ID_t ID) in input_formatter_get_alignment()
85 assert(ID < N_INPUT_FORMATTER_ID); in input_formatter_get_alignment()
87 return input_formatter_alignment[ID]; in input_formatter_get_alignment()
91 const input_formatter_ID_t ID, in input_formatter_set_fifo_blocking_mode()
60 input_formatter_rst( const input_formatter_ID_t ID) input_formatter_rst() argument
82 input_formatter_get_alignment( const input_formatter_ID_t ID) input_formatter_get_alignment() argument
90 input_formatter_set_fifo_blocking_mode( const input_formatter_ID_t ID, const bool enable) input_formatter_set_fifo_blocking_mode() argument
104 input_formatter_get_switch_state( const input_formatter_ID_t ID, input_formatter_switch_state_t *state) input_formatter_get_switch_state() argument
138 input_formatter_get_state( const input_formatter_ID_t ID, input_formatter_state_t *state) input_formatter_get_state() argument
219 input_formatter_bin_get_state( const input_formatter_ID_t ID, input_formatter_bin_state_t *state) input_formatter_bin_get_state() argument
[all...]
H A Dsp_private.h26 const sp_ID_t ID, in sp_ctrl_store()
30 assert(ID < N_SP_ID); in sp_ctrl_store()
31 assert(SP_CTRL_BASE[ID] != (hrt_address)-1); in sp_ctrl_store()
32 ia_css_device_store_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in sp_ctrl_store()
37 const sp_ID_t ID,
40 assert(ID < N_SP_ID);
41 assert(SP_CTRL_BASE[ID] != (hrt_address)-1);
42 return ia_css_device_load_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data));
46 const sp_ID_t ID,
50 hrt_data val = sp_ctrl_load(ID, re
25 sp_ctrl_store( const sp_ID_t ID, const hrt_address reg, const hrt_data value) sp_ctrl_store() argument
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H A Dgp_device.c24 const gp_device_ID_t ID, in gp_device_get_state()
27 assert(ID < N_GP_DEVICE_ID); in gp_device_get_state()
30 state->syncgen_enable = gp_device_reg_load(ID, in gp_device_get_state()
32 state->syncgen_free_running = gp_device_reg_load(ID, in gp_device_get_state()
34 state->syncgen_pause = gp_device_reg_load(ID, in gp_device_get_state()
36 state->nr_frames = gp_device_reg_load(ID, in gp_device_get_state()
38 state->syngen_nr_pix = gp_device_reg_load(ID, in gp_device_get_state()
40 state->syngen_nr_pix = gp_device_reg_load(ID, in gp_device_get_state()
42 state->syngen_nr_lines = gp_device_reg_load(ID, in gp_device_get_state()
44 state->syngen_hblank_cycles = gp_device_reg_load(ID, in gp_device_get_state()
23 gp_device_get_state( const gp_device_ID_t ID, gp_device_state_t *state) gp_device_get_state() argument
[all...]
H A Disp_private.h31 const isp_ID_t ID, in isp_ctrl_store()
35 assert(ID < N_ISP_ID); in isp_ctrl_store()
36 assert(ISP_CTRL_BASE[ID] != (hrt_address) - 1); in isp_ctrl_store()
38 ia_css_device_store_uint32(ISP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in isp_ctrl_store()
40 hrt_master_port_store_32(ISP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); in isp_ctrl_store()
46 const isp_ID_t ID,
49 assert(ID < N_ISP_ID);
50 assert(ISP_CTRL_BASE[ID] != (hrt_address) - 1);
52 return ia_css_device_load_uint32(ISP_CTRL_BASE[ID] + reg * sizeof(hrt_data));
54 return hrt_master_port_uload_32(ISP_CTRL_BASE[ID]
30 isp_ctrl_store( const isp_ID_t ID, const unsigned int reg, const hrt_data value) isp_ctrl_store() argument
[all...]
H A Disp.c28 const isp_ID_t ID, in cnd_isp_irq_enable()
32 isp_ctrl_setbit(ID, ISP_IRQ_READY_REG, ISP_IRQ_READY_BIT); in cnd_isp_irq_enable()
34 isp_ctrl_setbit(ID, ISP_IRQ_CLEAR_REG, ISP_IRQ_CLEAR_BIT); in cnd_isp_irq_enable()
36 isp_ctrl_clearbit(ID, ISP_IRQ_READY_REG, in cnd_isp_irq_enable()
43 const isp_ID_t ID, in isp_get_state()
47 hrt_data sc = isp_ctrl_load(ID, ISP_SC_REG); in isp_get_state()
58 state->pc = isp_ctrl_load(ID, ISP_PC_REG); in isp_get_state()
60 state->is_broken = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_BROKEN_BIT); in isp_get_state()
61 state->is_idle = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_IDLE_BIT); in isp_get_state()
62 state->is_sleeping = isp_ctrl_getbit(ID, ISP_SC_RE in isp_get_state()
27 cnd_isp_irq_enable( const isp_ID_t ID, const bool cnd) cnd_isp_irq_enable() argument
42 isp_get_state( const isp_ID_t ID, isp_state_t *state, isp_stall_t *stall) isp_get_state() argument
105 isp_is_ready(isp_ID_t ID) isp_is_ready() argument
112 isp_is_sleeping(isp_ID_t ID) isp_is_sleeping() argument
119 isp_start(isp_ID_t ID) isp_start() argument
125 isp_wake(isp_ID_t ID) isp_wake() argument
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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/css_2401_system/host/
H A Dpixelgen_private.h33 const pixelgen_ID_t ID, in pixelgen_ctrl_reg_load()
36 assert(ID < N_PIXELGEN_ID); in pixelgen_ctrl_reg_load()
37 assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address) - 1); in pixelgen_ctrl_reg_load()
38 return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof( in pixelgen_ctrl_reg_load()
47 const pixelgen_ID_t ID,
51 assert(ID < N_PIXELGEN_ID);
52 assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1);
54 ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data),
70 const pixelgen_ID_t ID,
74 pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_ID
32 pixelgen_ctrl_reg_load( const pixelgen_ID_t ID, const hrt_address reg) pixelgen_ctrl_reg_load() argument
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H A Dcsi_rx_private.h38 const csi_rx_frontend_ID_t ID, in csi_rx_fe_ctrl_reg_load()
41 assert(ID < N_CSI_RX_FRONTEND_ID); in csi_rx_fe_ctrl_reg_load()
42 assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); in csi_rx_fe_ctrl_reg_load()
43 return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof( in csi_rx_fe_ctrl_reg_load()
52 const csi_rx_frontend_ID_t ID,
56 assert(ID < N_CSI_RX_FRONTEND_ID);
57 assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1);
59 ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data),
68 const csi_rx_backend_ID_t ID,
71 assert(ID < N_CSI_RX_BACKEND_I
37 csi_rx_fe_ctrl_reg_load( const csi_rx_frontend_ID_t ID, const hrt_address reg) csi_rx_fe_ctrl_reg_load() argument
[all...]
/kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/css_2401_system/host/
H A Dpixelgen_private.h33 const pixelgen_ID_t ID, in pixelgen_ctrl_reg_load()
36 assert(ID < N_PIXELGEN_ID); in pixelgen_ctrl_reg_load()
37 assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address) - 1); in pixelgen_ctrl_reg_load()
38 return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof( in pixelgen_ctrl_reg_load()
47 const pixelgen_ID_t ID,
51 assert(ID < N_PIXELGEN_ID);
52 assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1);
54 ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data),
70 const pixelgen_ID_t ID,
74 pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_ID
32 pixelgen_ctrl_reg_load( const pixelgen_ID_t ID, const hrt_address reg) pixelgen_ctrl_reg_load() argument
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H A Dcsi_rx_private.h38 const csi_rx_frontend_ID_t ID, in csi_rx_fe_ctrl_reg_load()
41 assert(ID < N_CSI_RX_FRONTEND_ID); in csi_rx_fe_ctrl_reg_load()
42 assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); in csi_rx_fe_ctrl_reg_load()
43 return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof( in csi_rx_fe_ctrl_reg_load()
52 const csi_rx_frontend_ID_t ID,
56 assert(ID < N_CSI_RX_FRONTEND_ID);
57 assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1);
59 ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data),
68 const csi_rx_backend_ID_t ID,
71 assert(ID < N_CSI_RX_BACKEND_I
37 csi_rx_fe_ctrl_reg_load( const csi_rx_frontend_ID_t ID, const hrt_address reg) csi_rx_fe_ctrl_reg_load() argument
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/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/
H A Disp2401_input_system_private.h27 static inline hrt_data ibuf_ctrl_reg_load(const ibuf_ctrl_ID_t ID, in ibuf_ctrl_reg_load() argument
30 assert(ID < N_IBUF_CTRL_ID); in ibuf_ctrl_reg_load()
31 assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); in ibuf_ctrl_reg_load()
32 return ia_css_device_load_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data)); in ibuf_ctrl_reg_load()
36 static inline void ibuf_ctrl_reg_store(const ibuf_ctrl_ID_t ID,
40 assert(ID < N_IBUF_CTRL_ID);
41 assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1);
43 ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data), value);
47 static inline void ibuf_ctrl_get_proc_state(const ibuf_ctrl_ID_t ID,
57 ibuf_ctrl_reg_load(ID, reg_bank_offse
[all...]
H A Disp2400_input_system_private.h26 const input_system_ID_t ID, in input_system_reg_store()
30 assert(ID < N_INPUT_SYSTEM_ID); in input_system_reg_store()
31 assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); in input_system_reg_store()
32 ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof(hrt_data), in input_system_reg_store()
38 const input_system_ID_t ID,
41 assert(ID < N_INPUT_SYSTEM_ID);
42 assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1);
43 return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof(
48 const rx_ID_t ID,
52 assert(ID < N_RX_I
25 input_system_reg_store( const input_system_ID_t ID, const hrt_address reg, const hrt_data value) input_system_reg_store() argument
[all...]
/kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/
H A Disp2401_input_system_private.h27 static inline hrt_data ibuf_ctrl_reg_load(const ibuf_ctrl_ID_t ID, in ibuf_ctrl_reg_load() argument
30 assert(ID < N_IBUF_CTRL_ID); in ibuf_ctrl_reg_load()
31 assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); in ibuf_ctrl_reg_load()
32 return ia_css_device_load_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data)); in ibuf_ctrl_reg_load()
36 static inline void ibuf_ctrl_reg_store(const ibuf_ctrl_ID_t ID,
40 assert(ID < N_IBUF_CTRL_ID);
41 assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1);
43 ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data), value);
47 static inline void ibuf_ctrl_get_proc_state(const ibuf_ctrl_ID_t ID,
57 ibuf_ctrl_reg_load(ID, reg_bank_offse
[all...]
H A Disp2400_input_system_private.h26 const input_system_ID_t ID, in input_system_reg_store()
30 assert(ID < N_INPUT_SYSTEM_ID); in input_system_reg_store()
31 assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); in input_system_reg_store()
32 ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof(hrt_data), in input_system_reg_store()
38 const input_system_ID_t ID,
41 assert(ID < N_INPUT_SYSTEM_ID);
42 assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1);
43 return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof(
48 const rx_ID_t ID,
52 assert(ID < N_RX_I
25 input_system_reg_store( const input_system_ID_t ID, const hrt_address reg, const hrt_data value) input_system_reg_store() argument
[all...]
/kernel/linux/linux-5.10/drivers/scsi/aic7xxx/
H A Daic7xxx_osm_pci.c47 #define ID(x) ID_C(x, PCI_CLASS_STORAGE_SCSI) macro
51 ID(ID_AHA_2902_04_10_15_20C_30C),
53 ID(ID_AHA_2930CU),
54 ID(ID_AHA_1480A & ID_DEV_VENDOR_MASK),
55 ID(ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK),
56 ID(ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK),
57 ID(ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK),
59 ID(ID_AHA_2940),
60 ID(ID_AHA_3940),
61 ID(ID_AHA_398
[all...]
/kernel/linux/linux-6.6/drivers/scsi/aic7xxx/
H A Daic7xxx_osm_pci.c47 #define ID(x) ID_C(x, PCI_CLASS_STORAGE_SCSI) macro
51 ID(ID_AHA_2902_04_10_15_20C_30C),
53 ID(ID_AHA_2930CU),
54 ID(ID_AHA_1480A & ID_DEV_VENDOR_MASK),
55 ID(ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK),
56 ID(ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK),
57 ID(ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK),
59 ID(ID_AHA_2940),
60 ID(ID_AHA_3940),
61 ID(ID_AHA_398
[all...]

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